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Low-Power Vectorial Vliw Architecture for Maximum Parallelism Exploitation of Dynamic Programming Algorithms

AuthID
P-009-YX3

Author(s)

Cruz, M

Tomas, P

Roma, N

Editor(es)

Smari W.W.Zeljkovic V.

Tipo de Documento

Proceedings Paper

Year published

2014

Publicado

in Proceedings of the 2014 International Conference on High Performance Computing and Simulation, HPCS 2014

Páginas: 88-95

Conference

2014 International Conference on High Performance Computing and Simulation, Hpcs 2014, Date: 21 July 2014 through 25 July 2014, Patrocinadores: Altair;E4 Computer Engineering;et al.;Eurotech;Grid Telekom;HUAWEI Technologies Co., Ltd.

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Fontes

Publication Identifiers

DOI: 10.1109/hpcsim.2014.6903673

SCOPUS: 2-s2.0-84908645004

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Low-Power Vectorial Vliw Architecture for Maximum Parallelism Exploitation of Dynamic Programming Algorithms

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