Simulation and Modelling of Digital Delay Locked Loops

AuthID
 P-001-6E4
2
Author(s)
1
Editor(es)
RamirezAngulo, J
Tipo de Documento
Proceedings Paper
Year published
1999
Publicado
in 42ND MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, VOLS 1 AND 2
Volume: 2, Páginas: 843-846 (4)
Conference
42Nd Midwest Symposium on Circuits and Systems, Date: AUG 08-11, 1999, Location: LAS CRUCES, NM, Patrocinadores: IEEE Circuits & Syst Soc, Klipsch Sch Elect & Comp Engn, Host: NEW MEXICO STATE UNIV, CORBETT CTR
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Scopus®
Publication Identifiers
SCOPUS: 2-s2.0-0033292689
Wos: WOS:000089525800200
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