Switched-Capacitor Decimators Combining Low-Sensitivity Ladder Structures with High-Speed Polyphase Networks

AuthID
 P-001-F8C
3
Author(s)
daFranca, JE
·
Tipo de Documento
Article
Year published
1996
Publicado
in IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, ISSN: 1549-7747
Volume: 43, Número: 1, Páginas: 31-38 (8)
Indexing
Wos®
Scopus®
Crossref®
Google Scholar®
Publication Identifiers
SCOPUS: 2-s2.0-0029778565
Wos: WOS:A1996TU60800004
Source Identifiers
ISSN: 1549-7747
Export Publication Metadata
Lista Marked
 Adicionar à lista Marked
Info
At this moment we don't have any links to full text documens.

Um espaço para investigadores e suas Instituições

Links Úteis

Ajuda

© 2024 CRACS & Inesc TEC - All Rights Reserved Política de Privacidade | Terms of Service