Systematic Method For The Design Of Multiamplifier Switched-Capacitor Fir Decimator Circuits

AuthID
 P-001-QPG
2
Author(s)
DIAS, VF
Tipo de Documento
Article
Year published
1991
Publicado
in IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS, ISSN: 0956-3768
Volume: 138, Número: 3, Páginas: 307-314 (8)
Indexing
Wos®
Scopus®
Publication Identifiers
SCOPUS: 2-s2.0-0026169184
Wos: WOS:A1991FP28100003
Source Identifiers
ISSN: 0956-3768
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