Design and Characterization of a 20 Gbit/S Clock Recovery Circuit

AuthID
 P-00H-WYQ
4
Author(s)
da Rocha, JF
2
Editor(es)
Najafi, S. Iraj; Porte, Henri
Tipo de Documento
Proceedings Paper
Year published
1995
Publicado
in Fiber Optic Network Components
Indexing
Crossref®
Google Scholar®
Publication Identifiers
Export Publication Metadata
Lista Marked
 Adicionar à lista Marked
Info
At this moment we don't have any links to full text documens.

Um espaço para investigadores e suas Instituições

Links Úteis

Ajuda

© 2024 CRACS & Inesc TEC - All Rights Reserved Política de Privacidade | Terms of Service