A Comparison of Layout Implementations of Pipelined and Non-Pipelined Signed Radix-4 Array Multiplier and Modified Booth Multiplier Architectures

AuthID
P-00P-3QZ
8
Author(s)
de Oliveira, LL
·
Santos, C
·
Ferrao, D
·
Costa, E
·
Martins, JB
·
Reis, R
3
Editor(es)
Reis, R; Osseiran, A; Pfleiderer, HJ
Tipo de Documento
Proceedings Paper
Year published
2007
Publicado
in VLSI-SOC: FROM SYSTEMS TO SILICON in International Federation for Information Processing, ISSN: 1571-5736
Volume: 240, Páginas: 25-+ (3)
Conference
13Th International Conference on Very Large Scale Integration of System on Chip (Vlsi-Soc 2005), Date: OCT 17-19, 2005, Location: Perth, AUSTRALIA, Patrocinadores: Int Federat Informat Proc TC 10, WG 10 5
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Publication Identifiers
Wos: WOS:000249665600003
Source Identifiers
ISSN: 1571-5736
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