Layout Strategies for Substrate Crosstalk Reduction in Low Cost Cmos Processes

AuthID
 P-00P-K3A
4
Author(s)
dos Santos, PM
·
Quaresma, H
Tipo de Documento
Book Chapter
Year published
2018
Publicado
in Noise Coupling in System-on-Chip
Páginas: 233-259
Indexing
Scopus®
Google Scholar®
Publication Identifiers
SCOPUS: 2-s2.0-85052711443
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