High-Level Algorithms for the Optimization of Gate-Level Area in Digit-Serial Multiple Constant Multiplications

AuthID
P-002-9GT
Tipo de Documento
Article
Year published
2012
Publicado
in INTEGRATION-THE VLSI JOURNAL, ISSN: 0167-9260
Volume: 45, Número: 3, Páginas: 294-306 (13)
Indexing
Publication Identifiers
SCOPUS: 2-s2.0-84860516076
Wos: WOS:000304792100008
Source Identifiers
ISSN: 0167-9260
Export Publication Metadata
Info
At this moment we don't have any links to full text documens.