Theory and Original Design of Resistive-Inductive Network High-Pass Negative Group Delay Integrated Circuit in 130-Nm Cmos Technology

AuthID
 P-00W-AEQ
10
Author(s)
Guerin, M
·
Rahajandraibe, W
·
Silva, HS
·
Chan, G
·
Wan, FY
·
Thakur, P
·
Thakur, A
·
Frnda, J
·
Ravelo, B
Document Type
Article
Year published
2022
Published
in IEEE ACCESS, ISSN: 2169-3536
Volume: 10, Pages: 27147-27161 (15)
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Wos®
Google Scholar®
Publication Identifiers
Wos: WOS:000769966700001
Source Identifiers
ISSN: 2169-3536
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