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Ricardo Jorge Fernandes Chaves
AuthID:
R-000-FCD
Publications
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Proceedings Paper (31)
Article (13)
Book Chapter (1)
Correction (1)
Article in Press (1)
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Confirmed Publications: 47
21
TITLE:
RNS arithmetic units for modulo {2n±k}
AUTHORS:
Matutino, PM
;
Pettenghi, H
;
Chaves, R
;
Sousa, L
;
PUBLISHED:
2012
,
SOURCE:
15th Euromicro Conference on Digital System Design, DSD 2012
in
Proceedings - 15th Euromicro Conference on Digital System Design, DSD 2012
INDEXED IN:
Scopus
DBLP
CrossRef
IN MY:
ORCID
22
TITLE:
Binary-to-RNS conversion units for moduli {2n ± 3}
AUTHORS:
Matutino, PM
;
Chaves, R
;
Sousa, L
;
PUBLISHED:
2011
,
SOURCE:
2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011
in
Proceedings - 2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011
INDEXED IN:
Scopus
DBLP
CrossRef
IN MY:
ORCID
23
TITLE:
Compact CLEFIA implementation on FPGAS
AUTHORS:
Proenca, P;
Chaves, R
;
PUBLISHED:
2011
,
SOURCE:
21st International Conference on Field Programmable Logic and Applications, FPL 2011
in
Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011
INDEXED IN:
Scopus
CrossRef
IN MY:
ORCID
24
TITLE:
An improved RNS generator 2(n) +/- k based on threshold logic
AUTHORS:
Hector Pettenghi
;
Ricardo Chaves
;
Leonel Sousa
;
Maria J Avedillo
;
PUBLISHED:
2010
,
SOURCE:
18th IEEE/IFIP International Conference on VLSI and System-on-Chip
in
PROCEEDINGS OF THE 2010 18TH IEEE/IFIP INTERNATIONAL CONFERENCE ON VLSI AND SYSTEM-ON-CHIP
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
IN MY:
ORCID
|
ResearcherID
25
TITLE:
An Improved RNS Reverse Converter for the {2(2n+1)-1, 2(n), 2(n-1)} Moduli Set
AUTHORS:
Gbolagade, KA
;
Chaves, R
;
Sousa, L
;
Cotofana, SD
;
PUBLISHED:
2010
,
SOURCE:
International Symposium on Circuits and Systems Nano-Bio Circuit Fabrics and Systems (ISCAS 2010)
in
2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
IN MY:
ORCID
|
ResearcherID
26
TITLE:
Arithmetic units for RNS moduli {2(n)-3} and {2(n)+3} operations
AUTHORS:
Pedro Miguens Matutino
;
Ricardo Chaves
;
Leonel Sousa
;
PUBLISHED:
2010
,
SOURCE:
13th Euromicro Conference on Digital System Design on Architectures, Methods and Tools
in
13TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN: ARCHITECTURES, METHODS AND TOOLS
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
IN MY:
ORCID
27
TITLE:
Compact and Flexible Microcoded Elliptic Curve Processor for Reconfigurable Devices
AUTHORS:
Samuel Antao
;
Ricardo Chaves
;
Leonel Sousa
;
PUBLISHED:
2009
,
SOURCE:
17th Annual IEEE Symposium on Field Programmable Custom Computing Machines
in
PROCEEDINGS OF THE 2009 17TH IEEE SYMPOSIUM ON FIELD PROGRAMMABLE CUSTOM COMPUTING MACHINES
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
IN MY:
ORCID
|
ResearcherID
28
TITLE:
Residue-to-binary converters for the moduli set {22n+1-1,2 2n,2n-1}
AUTHORS:
Gbolagade, KA
;
Chaves, R
;
Sousa, L
;
Cotofana, SD
;
PUBLISHED:
2009
,
SOURCE:
2nd International Conference on Adaptive Science and Technology, ICAST 2009
in
ICAST 2009 - 2nd International Conference on Adaptive Science and Technology
INDEXED IN:
Scopus
CrossRef
IN MY:
ORCID
29
TITLE:
BRAM-LUT tradeoff on a polymorphic DES design
Full Text
AUTHORS:
Ricardo Chaves
; Blagomir Donchev; Georgi Kuzmanov;
Leonel Sousa
;
Stamatis Vassiliadis
;
PUBLISHED:
2008
,
SOURCE:
3rd International Conference on High Performance Embedded Architectures and Compilers
in
HIGH PERFORMANCE EMBEDDED ARCHITECTURES AND COMPILERS,
VOLUME:
4917
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
IN MY:
ORCID
|
ResearcherID
30
TITLE:
Cost-efficient SHA hardware accelerators
Full Text
AUTHORS:
Ricardo Chaves
; Georgi Kuzmanov;
Leonel Sousa
;
Starnatis Vassiliadis
;
PUBLISHED:
2008
,
SOURCE:
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS,
VOLUME:
16,
ISSUE:
8
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
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|
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