31
TITLE: Efficient FPGA Elliptic Curve Cryptographic Processor over GF(2(m))
AUTHORS: Samuel Antao; Ricardo Chaves ; Leonel Sousa ;
PUBLISHED: 2008, SOURCE: International Conference on Field-Programmable Technology in PROCEEDINGS OF THE 2008 INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY
INDEXED IN: Scopus WOS DBLP CrossRef
32
TITLE: Merged computation for Whirlpool hashing  Full Text
AUTHORS: Ricardo Chaves ; Georgi Kuzmanov; Leonel Sousa ; Stamatis Vassiliadis;
PUBLISHED: 2008, SOURCE: Design, Automation and Test in Europe Conference and Exhibition (DATE 08) in 2008 DESIGN, AUTOMATION AND TEST IN EUROPE, VOLS 1-3
INDEXED IN: Scopus WOS DBLP CrossRef
33
TITLE: ON-THE-FLY ATTESTATION OF RECONFIGURABLE HARDWARE
AUTHORS: Ricardo Chaves ; Georgi Kuzmanov; Leonel Sousa ;
PUBLISHED: 2008, SOURCE: 18th International Conference on Field Programmable and Logic Applications in 2008 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE AND LOGIC APPLICATIONS, VOLS 1 AND 2
INDEXED IN: Scopus WOS DBLP CrossRef
34
TITLE: Vectorized AES Core for High-throughput Secure Environments  Full Text
AUTHORS: Miquel Pericas; Ricardo Chaves ; Georgi N Gaydadjiev; Stamatis Vassiliadis; Mateo Valero;
PUBLISHED: 2008, SOURCE: 8th International Conference on High Performance Computing for Computational Science (VECPAR 2008) in HIGH PERFORMANCE COMPUTING FOR COMPUTATIONAL SCIENCE - VECPAR 2008, VOLUME: 5336
INDEXED IN: Scopus WOS CrossRef
35
TITLE: Improving residue number system multiplication with more balanced moduli sets and enhanced modular arithmetic structures  Full Text
AUTHORS: Chaves, R ; Sousa, L ;
PUBLISHED: 2007, SOURCE: 20th International Conference on Design of Circuits and Integrated Systems in IET COMPUTERS AND DIGITAL TECHNIQUES, VOLUME: 1, ISSUE: 5
INDEXED IN: Scopus WOS DBLP CrossRef
36
TITLE: Improving SHA-2 hardware implementations
AUTHORS: Ricardo Chaves ; Georgi Kuzmanov; Leonel Sousa ; Stamatis Vassiliadis;
PUBLISHED: 2006, SOURCE: 8th International Workshop on Cryptographic Hardware and Embedded Systems (CHES 2006) in CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS - CHES 2006, PROCEEDINGS, VOLUME: 4249
INDEXED IN: Scopus WOS DBLP CrossRef
37
TITLE: Reconfigurable memory based AES Co-processor
AUTHORS: Chaves, R ; Kuzmanov, G; Vassiliadis, S; Sousa, L ;
PUBLISHED: 2006, SOURCE: 20th International Parallel and Distributed Processing Symposium, IPDPS 2006, VOLUME: 2006
INDEXED IN: Scopus DBLP CrossRef
IN MY: ORCID
38
TITLE: Rescheduling for optimized SHA-1 calculation
AUTHORS: Ricardo Chaves ; Georgi Kuzmanov; Leonel Sousa ; Stamatis Vassiliadis;
PUBLISHED: 2006, SOURCE: 6th International Workshop on Embedded Computer Systems - Architectures, Modeling and Simulation in EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING, AND SIMULATION, PROCEEDINGS, VOLUME: 4017
INDEXED IN: Scopus WOS DBLP CrossRef
39
TITLE: A universal architecture for designing efficient modulo 2(n)+1 multipliers (vol 52, pg 1166, 2005)
AUTHORS: Sousa, L ; Chaves, R ;
PUBLISHED: 2005, SOURCE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, VOLUME: 52, ISSUE: 9
INDEXED IN: Scopus WOS DBLP CrossRef
40
TITLE: A universal architecture for designing efficient modulo 2(n),+1 multipliers
AUTHORS: Sousa, L ; Chaves, R ;
PUBLISHED: 2005, SOURCE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, VOLUME: 52, ISSUE: 6
INDEXED IN: Scopus WOS DBLP CrossRef
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