Jude Angelo Ambrose
AuthID: R-006-JVC
1
TITLE: Novel methodology to improve Multi-moduli architectures for Binary-to-RNS conversion
AUTHORS: Pettenghi, H; Sousa, L ; Ambrose, JA;
PUBLISHED: 2015, SOURCE: Conference on Design of Circuits and Integrated Systems, DCIS 2015 in 2015 Conference on Design of Circuits and Integrated Systems, DCIS 2015
AUTHORS: Pettenghi, H; Sousa, L ; Ambrose, JA;
PUBLISHED: 2015, SOURCE: Conference on Design of Circuits and Integrated Systems, DCIS 2015 in 2015 Conference on Design of Circuits and Integrated Systems, DCIS 2015
INDEXED IN: 
Scopus 
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TITLE: Novel methodology to improve Multi-moduli architectures for Binary-to-RNS conversion
AUTHORS: Hector Pettenghi; Leonel Sousa ; Jude Angelo Ambrose;
PUBLISHED: 2015, SOURCE: 2015 Conference on Design of Circuits and Integrated Systems (DCIS) in 2015 Conference on Design of Circuits and Integrated Systems (DCIS)
AUTHORS: Hector Pettenghi; Leonel Sousa ; Jude Angelo Ambrose;
PUBLISHED: 2015, SOURCE: 2015 Conference on Design of Circuits and Integrated Systems (DCIS) in 2015 Conference on Design of Circuits and Integrated Systems (DCIS)
INDEXED IN: 
WOS
WOS3
TITLE: Method for designing Multi-Channel RNS Architectures to prevent Power Analysis SCA
AUTHORS: Hector Pettenghi; Jude Angelo Ambrose; Ricardo Chaves ; Leonel Sousa ;
PUBLISHED: 2014, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
AUTHORS: Hector Pettenghi; Jude Angelo Ambrose; Ricardo Chaves ; Leonel Sousa ;
PUBLISHED: 2014, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
4
TITLE: DARNS: A randomized multi-modulo RNS architecture for double-and-add in ECC to prevent power analysis side channel attacks
AUTHORS: Ambrose, JA; Pettenghi, H ; Sousa, L ;
PUBLISHED: 2013, SOURCE: 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013 in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
AUTHORS: Ambrose, JA; Pettenghi, H ; Sousa, L ;
PUBLISHED: 2013, SOURCE: 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013 in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
5
TITLE: Randomised multi-modulo residue number system architecture for double-and-add to prevent power analysis side channel attacks
AUTHORS: Jude Angelo Ambrose; Hector Pettenghi ; Darshana Jayasinghe; Leonel Sousa ;
PUBLISHED: 2013, SOURCE: IET CIRCUITS DEVICES & SYSTEMS, VOLUME: 7, ISSUE: 5
AUTHORS: Jude Angelo Ambrose; Hector Pettenghi ; Darshana Jayasinghe; Leonel Sousa ;
PUBLISHED: 2013, SOURCE: IET CIRCUITS DEVICES & SYSTEMS, VOLUME: 7, ISSUE: 5
6
TITLE: DARNS: A Randomized Multi-modulo RNS Architecture for Double-and-Add in ECC to prevent Power Analysis Side Channel Attacks
AUTHORS: Jude Angelo Ambrose; Hector Pettenghi; Leonel Sousa;
PUBLISHED: 2013, SOURCE: 18th Asia and South Pacific Design Automation Conference (ASP-DAC) in 2013 18TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC)
AUTHORS: Jude Angelo Ambrose; Hector Pettenghi; Leonel Sousa;
PUBLISHED: 2013, SOURCE: 18th Asia and South Pacific Design Automation Conference (ASP-DAC) in 2013 18TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC)
INDEXED IN: WOS
WOS7
TITLE: Efficient implementation of multi-moduli architectures for Binary-to-RNS conversion
AUTHORS: Hector Pettenghi ; Leonel Sousa ; Jude Angelo Ambrose;
PUBLISHED: 2012, SOURCE: 17th Asia and South Pacific Design Automation Conference (ASP-DAC) in 2012 17TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC)
AUTHORS: Hector Pettenghi ; Leonel Sousa ; Jude Angelo Ambrose;
PUBLISHED: 2012, SOURCE: 17th Asia and South Pacific Design Automation Conference (ASP-DAC) in 2012 17TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC)
