Hector Pettenghi Roldan
AuthID: R-000-XX8
21
TITLE: Self-latching operation of MOBILE circuits using series-connection of RTDs and transistors
AUTHORS: Avedillo, MJ; Quintana, JM; Pettenghi, H;
PUBLISHED: 2006, SOURCE: IEEE Transactions on Circuits and Systems II: Express Briefs, VOLUME: 53, ISSUE: 5
AUTHORS: Avedillo, MJ; Quintana, JM; Pettenghi, H;
PUBLISHED: 2006, SOURCE: IEEE Transactions on Circuits and Systems II: Express Briefs, VOLUME: 53, ISSUE: 5
22
TITLE: Increased logic functionality of clocked series-connected RTDS
AUTHORS: Avedillo, MJ; Quintana, JM; Pettenghi Roldan, H;
PUBLISHED: 2006, SOURCE: IEEE Transactions on Nanotechnology, VOLUME: 5, ISSUE: 5
AUTHORS: Avedillo, MJ; Quintana, JM; Pettenghi Roldan, H;
PUBLISHED: 2006, SOURCE: IEEE Transactions on Nanotechnology, VOLUME: 5, ISSUE: 5
23
TITLE: Single phase clock scheme for mobile logic gates Full Text
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2006, SOURCE: Electronics Letters, VOLUME: 42, ISSUE: 24
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2006, SOURCE: Electronics Letters, VOLUME: 42, ISSUE: 24
24
TITLE: Self-latching operation limits for MOBILE circuits
AUTHORS: Quintana, JM; Avedillo, MJ; Pettenghi, H;
PUBLISHED: 2006, SOURCE: ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems in Proceedings - IEEE International Symposium on Circuits and Systems
AUTHORS: Quintana, JM; Avedillo, MJ; Pettenghi, H;
PUBLISHED: 2006, SOURCE: ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems in Proceedings - IEEE International Symposium on Circuits and Systems
INDEXED IN: 
Scopus
Scopus IN MY: 
ORCID
ORCID25
TITLE: Logic models supporting the design of MOBILE-based RTD circuits Full Text
AUTHORS: Avedillo, MJ; Quintana, JM; Pettenghi, H;
PUBLISHED: 2005, SOURCE: IEEE 16th International Conference on Application-Specific Systems, Architectures, and Processors, ASAP 2005 in Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors
AUTHORS: Avedillo, MJ; Quintana, JM; Pettenghi, H;
PUBLISHED: 2005, SOURCE: IEEE 16th International Conference on Application-Specific Systems, Architectures, and Processors, ASAP 2005 in Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors
26
TITLE: New circuit topology for logic gates based on RTDs
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2005, SOURCE: 2005 5th IEEE Conference on Nanotechnology in 2005 5th IEEE Conference on Nanotechnology, VOLUME: 1
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2005, SOURCE: 2005 5th IEEE Conference on Nanotechnology in 2005 5th IEEE Conference on Nanotechnology, VOLUME: 1
27
TITLE: Novel improved RTD-based implementation of multi-threshold logic gates
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2005, SOURCE: 2005 PhD Research in Microelectronics and Electronics Conference in 2005 PhD Research in Microelectronics and Electronics - Proceedingsof the Conference, VOLUME: I
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2005, SOURCE: 2005 PhD Research in Microelectronics and Electronics Conference in 2005 PhD Research in Microelectronics and Electronics - Proceedingsof the Conference, VOLUME: I
28
TITLE: RTD-based compact programmable gates Full Text
AUTHORS: Quintana, JM; Avedillo, MJ; Pettenghi, H;
PUBLISHED: 2004, SOURCE: 2004 IEEE International Joint Conference on Neural Networks - Proceedings in IEEE International Conference on Neural Networks - Conference Proceedings, VOLUME: 4
AUTHORS: Quintana, JM; Avedillo, MJ; Pettenghi, H;
PUBLISHED: 2004, SOURCE: 2004 IEEE International Joint Conference on Neural Networks - Proceedings in IEEE International Conference on Neural Networks - Conference Proceedings, VOLUME: 4
INDEXED IN: Scopus
Scopus IN MY: ORCID
ORCID29
TITLE: Useful logic blocks based on clocked series-connected RTDs
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2004, SOURCE: 2004 4th IEEE Conference on Nanotechnology in 2004 4th IEEE Conference on Nanotechnology
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2004, SOURCE: 2004 4th IEEE Conference on Nanotechnology in 2004 4th IEEE Conference on Nanotechnology
INDEXED IN: Scopus
Scopus IN MY: ORCID
ORCID30
TITLE: Programmable logic gate based on resonant tunneling devices
AUTHORS: Quintana, JM; Avedillo, MJ; Pettenghi, H;
PUBLISHED: 2004, SOURCE: 2004 IEEE International Symposium on Cirquits and Systems - Proceedings in Proceedings - IEEE International Symposium on Circuits and Systems, VOLUME: 3
AUTHORS: Quintana, JM; Avedillo, MJ; Pettenghi, H;
PUBLISHED: 2004, SOURCE: 2004 IEEE International Symposium on Cirquits and Systems - Proceedings in Proceedings - IEEE International Symposium on Circuits and Systems, VOLUME: 3
INDEXED IN: Scopus
Scopus IN MY: ORCID
ORCID