João Paulo de Castro Canas Ferreira


AuthID: R-000-7A5

Publicações Confirmadas: 96



21
TÍTULO: Wearable sensor networks for human gait
AUTORES: Da Silva, JM ; Derogarian, F; Ferreira, JC ; Tavares, VG ;
PUBLICAÇÃO: 2019, FONTE: Wearable Technologies and Wireless Body Sensor Networks for Healthcare
INDEXADO EM: Scopus CrossRef: 1
NO MEU: ORCID
22
TÍTULO: A Parallel-Pipelined OFDM Baseband Modulator with Dynamic Frequency Scaling for 5G Systems
AUTORES: Mário Lopes Ferreira ; João Canas Ferreira ; Michael Hübner;
PUBLICAÇÃO: 2018, FONTE: 14th International Symposium on Applied Reconfigurable Computing, ARC 2018 in Applied Reconfigurable Computing. Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Santorini, Greece, May 2-4, 2018, Proceedings, VOLUME: 10824
INDEXADO EM: Scopus DBLP CrossRef: 1
NO MEU: ORCID | DBLP
23
TÍTULO: A Reconfigurable Custom Machine for Accelerating Cellular Genetic Algorithms
AUTORES: Santos, PV; José Carlos Alves ; João Canas Ferreira ;
PUBLICAÇÃO: 2018, FONTE: U.Porto Journal of Engineering, VOLUME: 2, NÚMERO: 2
INDEXADO EM: CrossRef: 1
NO MEU: ORCID
24
TÍTULO: An FPGA array for cellular genetic algorithms: Application to the minimum energy broadcast problem  Full Text
AUTORES: Pedro Vieira dos Santos; Jose Carlos Alves ; Joao Canas Ferreira ;
PUBLICAÇÃO: 2018, FONTE: 18th Euromicro Conference on Digital System Design (DSD) in MICROPROCESSORS AND MICROSYSTEMS, VOLUME: 58
INDEXADO EM: Scopus WOS DBLP CrossRef: 5
NO MEU: ORCID | DBLP
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TÍTULO: Design and Evaluation of a Low Power CGRA Accelerator for Biomedical Signal Processing
AUTORES: Helder H Avelar ; João Canas Ferreira ;
PUBLICAÇÃO: 2018, FONTE: 21st Euromicro Conference on Digital System Design, DSD 2018 in 21st Euromicro Conference on Digital System Design, DSD 2018, Prague, Czech Republic, August 29-31, 2018
INDEXADO EM: Scopus DBLP CrossRef: 3
NO MEU: ORCID | DBLP
28
TÍTULO: Flexible and Dynamically Reconfigurable FPGA-Based FS-FBMC Baseband Modulator
AUTORES: Mario Lopes Ferreira; Joao Canas Ferreira ;
PUBLICAÇÃO: 2018, FONTE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLUME: 2018-May
INDEXADO EM: Scopus WOS DBLP CrossRef: 6
NO MEU: ORCID | DBLP
29
TÍTULO: Evaluation of CGRA architecture for real-time processing of biological signals on wearable devices
AUTORES: Joao Lopes; Diogo Sousa; Joao Canas Ferreira ;
PUBLICAÇÃO: 2017, FONTE: International Conference on Reconfigurable Computing and FPGAs (ReConFig) in 2017 INTERNATIONAL CONFERENCE ON RECONFIGURABLE COMPUTING AND FPGAS (RECONFIG)
INDEXADO EM: WOS DBLP CrossRef: 13
NO MEU: ORCID | DBLP
30
TÍTULO: FPGA-based Implementation of a Frequency Spreading FBMC-OQAM Baseband Modulator
AUTORES: Miguel Carvalho; Mario Lopes Ferreira ; Joao Canas Ferreira ;
PUBLICAÇÃO: 2017, FONTE: 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS) in 2017 24TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS)
INDEXADO EM: WOS DBLP CrossRef: 4
NO MEU: ORCID | DBLP
Página 3 de 10. Total de resultados: 96.

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