Leonel Augusto Pires Seabra Sousa


AuthID: R-000-93B

Publicações Confirmadas: 283



21
TÍTULO: GPU acceleration of the HEVC decoder inter prediction module
AUTORES: Diego de d Souza; Aleksandar Ilic; Nuno Roma ; Leonel Sousa ;
PUBLICAÇÃO: 2015, FONTE: IEEE Global Conference on Signal and Information Processing, GlobalSIP 2015 in 2015 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2015, Orlando, FL, USA, December 14-16, 2015
INDEXADO EM: Scopus DBLP CrossRef
NO MEU: ORCID | DBLP
22
TÍTULO: HEVC In-Loop Filters GPU Parallelization in Embedded Systems
AUTORES: Diego F de Souza; Aleksandar Ilic; Nuno Roma ; Leonel Sousa ;
PUBLICAÇÃO: 2015, FONTE: International Conference on Embedded Computer Systems Architectures Modeling and Simulation in Proceedings International Conference on Embedded Computer Systems - Architectures, Modeling and Simulation (SAMOS XV)
INDEXADO EM: WOS
23
TÍTULO: HEVC in-loop filters GPU parallelization in embedded systems
AUTORES: Diego de d Souza; Aleksandar Ilic; Nuno Roma ; Leonel Sousa ;
PUBLICAÇÃO: 2015, FONTE: 15th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS 2015 in 2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2015, Samos, Greece, July 19-23, 2015
INDEXADO EM: Scopus DBLP CrossRef
NO MEU: ORCID | DBLP
24
TÍTULO: High performance IP core for HEVC quantization
AUTORES: Tiago Dias; Nuno Roma ; Leonel Sousa ;
PUBLICAÇÃO: 2015, FONTE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLUME: 2015-July
INDEXADO EM: Scopus WOS DBLP CrossRef
NO MEU: ORCID | DBLP
25
TÍTULO: Novel methodology to improve Multi-moduli architectures for Binary-to-RNS conversion
AUTORES: Hector Pettenghi; Leonel Sousa ; Jude Angelo Ambrose;
PUBLICAÇÃO: 2015, FONTE: 2015 Conference on Design of Circuits and Integrated Systems (DCIS) in 2015 Conference on Design of Circuits and Integrated Systems (DCIS)
INDEXADO EM: WOS
26
TÍTULO: Novel methodology to improve Multi-moduli architectures for Binary-to-RNS conversion
AUTORES: Pettenghi, H; Sousa, L ; Ambrose, JA;
PUBLICAÇÃO: 2015, FONTE: Conference on Design of Circuits and Integrated Systems, DCIS 2015 in 2015 Conference on Design of Circuits and Integrated Systems, DCIS 2015
INDEXADO EM: Scopus CrossRef
NO MEU: ORCID
27
TÍTULO: Programmable RNS Lattice-Based Parallel Cryptographic Decryption  Full Text
AUTORES: Paulo Martins; Leonel Sousa ; Julien Eynard; Jean Claude Bajard;
PUBLICAÇÃO: 2015, FONTE: 26th International Conference on Application-Specific Systems, Architectures and Processors (ASAP) in PROCEEDINGS OF THE ASAP2015 2015 IEEE 26TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS, VOLUME: 2015-September
INDEXADO EM: Scopus WOS DBLP CrossRef
NO MEU: ORCID | DBLP
28
TÍTULO: Real-time implementation of remotely sensed hyperspectral image unmixing on GPUs  Full Text
AUTORES: Sanchez, S; Ramalho, R; Sousa, L ; Plaza, A;
PUBLICAÇÃO: 2015, FONTE: JOURNAL OF REAL-TIME IMAGE PROCESSING, VOLUME: 10, NÚMERO: 3
INDEXADO EM: Scopus WOS
29
TÍTULO: Real-time implementation of remotely sensed hyperspectral image unmixing on GPUs  Full Text
AUTORES: Sergio Sánchez; Rui Ramalho; Leonel Sousa ; Antonio Plaza;
PUBLICAÇÃO: 2015, FONTE: J. Real-Time Image Processing, VOLUME: 10, NÚMERO: 3
INDEXADO EM: DBLP CrossRef
NO MEU: ORCID | DBLP
30
TÍTULO: Real-time implementation of remotely sensed hyperspectral image unmixing on GPUs
AUTORES: Sanchez, S; Ramalho, R; Sousa, L ; Plaza, A;
PUBLICAÇÃO: 2015, FONTE: Journal of Real-Time Image Processing, VOLUME: 10, NÚMERO: 3
INDEXADO EM: Scopus
NO MEU: ORCID
Página 3 de 29. Total de resultados: 283.

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