Hector Pettenghi Roldan
AuthID: R-000-XX8
21
TÃTULO: Self-latching operation of MOBILE circuits using series-connection of RTDs and transistors
AUTORES: Avedillo, MJ; Quintana, JM; Pettenghi, H;
PUBLICAÇÃO: 2006, FONTE: IEEE Transactions on Circuits and Systems II: Express Briefs, VOLUME: 53, NÚMERO: 5
AUTORES: Avedillo, MJ; Quintana, JM; Pettenghi, H;
PUBLICAÇÃO: 2006, FONTE: IEEE Transactions on Circuits and Systems II: Express Briefs, VOLUME: 53, NÚMERO: 5
22
TÃTULO: Increased logic functionality of clocked series-connected RTDS
AUTORES: Avedillo, MJ; Quintana, JM; Pettenghi Roldan, H;
PUBLICAÇÃO: 2006, FONTE: IEEE Transactions on Nanotechnology, VOLUME: 5, NÚMERO: 5
AUTORES: Avedillo, MJ; Quintana, JM; Pettenghi Roldan, H;
PUBLICAÇÃO: 2006, FONTE: IEEE Transactions on Nanotechnology, VOLUME: 5, NÚMERO: 5
23
TÃTULO: Single phase clock scheme for mobile logic gates Full Text
AUTORES: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLICAÇÃO: 2006, FONTE: Electronics Letters, VOLUME: 42, NÚMERO: 24
AUTORES: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLICAÇÃO: 2006, FONTE: Electronics Letters, VOLUME: 42, NÚMERO: 24
24
TÃTULO: Self-latching operation limits for MOBILE circuits
AUTORES: Quintana, JM; Avedillo, MJ; Pettenghi, H;
PUBLICAÇÃO: 2006, FONTE: ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems in Proceedings - IEEE International Symposium on Circuits and Systems
AUTORES: Quintana, JM; Avedillo, MJ; Pettenghi, H;
PUBLICAÇÃO: 2006, FONTE: ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems in Proceedings - IEEE International Symposium on Circuits and Systems
INDEXADO EM: Scopus
NO MEU: ORCID
25
TÃTULO: Logic models supporting the design of MOBILE-based RTD circuits Full Text
AUTORES: Avedillo, MJ; Quintana, JM; Pettenghi, H;
PUBLICAÇÃO: 2005, FONTE: IEEE 16th International Conference on Application-Specific Systems, Architectures, and Processors, ASAP 2005 in Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors
AUTORES: Avedillo, MJ; Quintana, JM; Pettenghi, H;
PUBLICAÇÃO: 2005, FONTE: IEEE 16th International Conference on Application-Specific Systems, Architectures, and Processors, ASAP 2005 in Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors
26
TÃTULO: New circuit topology for logic gates based on RTDs
AUTORES: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLICAÇÃO: 2005, FONTE: 2005 5th IEEE Conference on Nanotechnology in 2005 5th IEEE Conference on Nanotechnology, VOLUME: 1
AUTORES: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLICAÇÃO: 2005, FONTE: 2005 5th IEEE Conference on Nanotechnology in 2005 5th IEEE Conference on Nanotechnology, VOLUME: 1
27
TÃTULO: Novel improved RTD-based implementation of multi-threshold logic gates
AUTORES: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLICAÇÃO: 2005, FONTE: 2005 PhD Research in Microelectronics and Electronics Conference in 2005 PhD Research in Microelectronics and Electronics - Proceedingsof the Conference, VOLUME: I
AUTORES: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLICAÇÃO: 2005, FONTE: 2005 PhD Research in Microelectronics and Electronics Conference in 2005 PhD Research in Microelectronics and Electronics - Proceedingsof the Conference, VOLUME: I
28
TÃTULO: RTD-based compact programmable gates Full Text
AUTORES: Quintana, JM; Avedillo, MJ; Pettenghi, H;
PUBLICAÇÃO: 2004, FONTE: 2004 IEEE International Joint Conference on Neural Networks - Proceedings in IEEE International Conference on Neural Networks - Conference Proceedings, VOLUME: 4
AUTORES: Quintana, JM; Avedillo, MJ; Pettenghi, H;
PUBLICAÇÃO: 2004, FONTE: 2004 IEEE International Joint Conference on Neural Networks - Proceedings in IEEE International Conference on Neural Networks - Conference Proceedings, VOLUME: 4
INDEXADO EM: Scopus
NO MEU: ORCID
29
TÃTULO: Useful logic blocks based on clocked series-connected RTDs
AUTORES: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLICAÇÃO: 2004, FONTE: 2004 4th IEEE Conference on Nanotechnology in 2004 4th IEEE Conference on Nanotechnology
AUTORES: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLICAÇÃO: 2004, FONTE: 2004 4th IEEE Conference on Nanotechnology in 2004 4th IEEE Conference on Nanotechnology
INDEXADO EM: Scopus
NO MEU: ORCID
30
TÃTULO: Programmable logic gate based on resonant tunneling devices
AUTORES: Quintana, JM; Avedillo, MJ; Pettenghi, H;
PUBLICAÇÃO: 2004, FONTE: 2004 IEEE International Symposium on Cirquits and Systems - Proceedings in Proceedings - IEEE International Symposium on Circuits and Systems, VOLUME: 3
AUTORES: Quintana, JM; Avedillo, MJ; Pettenghi, H;
PUBLICAÇÃO: 2004, FONTE: 2004 IEEE International Symposium on Cirquits and Systems - Proceedings in Proceedings - IEEE International Symposium on Circuits and Systems, VOLUME: 3
INDEXADO EM: Scopus
NO MEU: ORCID