Vasco Rafael Póvoa Fernandes
AuthID: R-001-Q7E
21
TÃTULO: Systematic design of a voltage controlled oscillator using a layout-aware approach
AUTORES: Passos, F; Roca, E; Castro Lopez, R; Fernandez, FV; Martins, R; Lourenco, N ; Povoa, R; Canelas, A; Horta, N ;
PUBLICAÇÃO: 2017, FONTE: 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017 in SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
AUTORES: Passos, F; Roca, E; Castro Lopez, R; Fernandez, FV; Martins, R; Lourenco, N ; Povoa, R; Canelas, A; Horta, N ;
PUBLICAÇÃO: 2017, FONTE: 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017 in SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
INDEXADO EM: 
Scopus 
CrossRef
Scopus CrossRef22
TÃTULO: A dynamic voltage-combiners biased OTA for low-power and high-speed SC circuits
AUTORES: Póvoa, R; Canelas, A; Martins, R; Lourenço, N ; Horta, N ; Goes, J;
PUBLICAÇÃO: 2017, FONTE: 13th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2017 in PRIME 2017 - 13th Conference on PhD Research in Microelectronics and Electronics, Proceedings
AUTORES: Póvoa, R; Canelas, A; Martins, R; Lourenço, N ; Horta, N ; Goes, J;
PUBLICAÇÃO: 2017, FONTE: 13th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2017 in PRIME 2017 - 13th Conference on PhD Research in Microelectronics and Electronics, Proceedings
INDEXADO EM: Scopus CrossRef
Scopus CrossRef23
TÃTULO: Automatic synthesis of RF front-end blocks using multi-objective evolutionary techniques Full Text
AUTORES: Povoa, R; Bastos, I; Lourenco, N ; Horta, N ;
PUBLICAÇÃO: 2016, FONTE: INTEGRATION-THE VLSI JOURNAL, VOLUME: 52
AUTORES: Povoa, R; Bastos, I; Lourenco, N ; Horta, N ;
PUBLICAÇÃO: 2016, FONTE: INTEGRATION-THE VLSI JOURNAL, VOLUME: 52
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TÃTULO: Yield Optimization using K-Means Clustering Algorithm to reduce Monte Carlo Simulations
AUTORES: Antonio Canelas; Ricardo Martins; Ricardo Povoa; Nuno Lourenco ; Nuno Horta ;
PUBLICAÇÃO: 2016, FONTE: 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) in 2016 13TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
AUTORES: Antonio Canelas; Ricardo Martins; Ricardo Povoa; Nuno Lourenco ; Nuno Horta ;
PUBLICAÇÃO: 2016, FONTE: 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) in 2016 13TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
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TÃTULO: Current-flow and current-density-aware multi-objective optimization of analog IC placement Full Text
AUTORES: Ricardo Martins ; Ricardo Povoa; Nuno Lourenco ; Nuno Horta ;
PUBLICAÇÃO: 2016, FONTE: INTEGRATION-THE VLSI JOURNAL, VOLUME: 55
AUTORES: Ricardo Martins ; Ricardo Povoa; Nuno Lourenco ; Nuno Horta ;
PUBLICAÇÃO: 2016, FONTE: INTEGRATION-THE VLSI JOURNAL, VOLUME: 55
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TÃTULO: AIDA: Layout-aware analog circuit-level sizing with in-loop layout generation Full Text
AUTORES: Nuno Lourenco ; Ricardo Martins ; Antonio Canelas; Ricardo Povoa; Nuno Horta ;
PUBLICAÇÃO: 2016, FONTE: INTEGRATION-THE VLSI JOURNAL, VOLUME: 55
AUTORES: Nuno Lourenco ; Ricardo Martins ; Antonio Canelas; Ricardo Povoa; Nuno Horta ;
PUBLICAÇÃO: 2016, FONTE: INTEGRATION-THE VLSI JOURNAL, VOLUME: 55
27
TÃTULO: Design and application of a CMOS active inductor at Ku band based on a multi-objective optimizer Full Text
AUTORES: Mrinalinee Pandey; Antonio Canelas; Ricardo Povoa; Jorge Alves Torres; Costa Freire, JC; Nuno Lourenco ; Nuno Horta ;
PUBLICAÇÃO: 2016, FONTE: INTEGRATION-THE VLSI JOURNAL, VOLUME: 55
AUTORES: Mrinalinee Pandey; Antonio Canelas; Ricardo Povoa; Jorge Alves Torres; Costa Freire, JC; Nuno Lourenco ; Nuno Horta ;
PUBLICAÇÃO: 2016, FONTE: INTEGRATION-THE VLSI JOURNAL, VOLUME: 55
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TÃTULO: Floorplan-aware analog IC sizing and optimization based on topological constraints Full Text
AUTORES: Nuno Lourenco ; Antonio Canelas; Ricardo Povoa; Ricardo Martins ; Nuno Horta ;
PUBLICAÇÃO: 2015, FONTE: INTEGRATION-THE VLSI JOURNAL, VOLUME: 48, NÚMERO: 1
AUTORES: Nuno Lourenco ; Antonio Canelas; Ricardo Povoa; Ricardo Martins ; Nuno Horta ;
PUBLICAÇÃO: 2015, FONTE: INTEGRATION-THE VLSI JOURNAL, VOLUME: 48, NÚMERO: 1
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TÃTULO: Eu3+ luminescence in aluminophosphate glasses (vol 145, pg 582, 2014) Full Text
AUTORES: Nico, C; Fernandes, R; Graca, MPF; Elisa, M; Sava, BA; Monteiro, RCC; Rino, L; Monteiro, T;
PUBLICAÇÃO: 2015, FONTE: JOURNAL OF LUMINESCENCE, VOLUME: 161
AUTORES: Nico, C; Fernandes, R; Graca, MPF; Elisa, M; Sava, BA; Monteiro, RCC; Rino, L; Monteiro, T;
PUBLICAÇÃO: 2015, FONTE: JOURNAL OF LUMINESCENCE, VOLUME: 161
INDEXADO EM: Scopus 
WOS
Scopus WOS30
TÃTULO: A Voltage-Combiners-Biased Amplifier with Enhanced Gain and Speed using Current Starving
AUTORES: Povoa, R; Lourenco, N ; Horta, N ; Goes, J;
PUBLICAÇÃO: 2015, FONTE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLUME: 2015-July
AUTORES: Povoa, R; Lourenco, N ; Horta, N ; Goes, J;
PUBLICAÇÃO: 2015, FONTE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLUME: 2015-July
