José Carlos Alves Pereira Monteiro
AuthID: R-000-85F
21
TÃTULO: Quaternary logic lookup table in standard CMOS
AUTORES: Brito, D; Rabuske, TG; Fernandes, JR; Flores, P; Monteiro, J;
PUBLICAÇÃO: 2015, FONTE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, NÚMERO: 2
AUTORES: Brito, D; Rabuske, TG; Fernandes, JR; Flores, P; Monteiro, J;
PUBLICAÇÃO: 2015, FONTE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, NÚMERO: 2
INDEXADO EM: 
Scopus
Scopus22
TÃTULO: Efficient Design of FIR Filters Using Hybrid Multiple Constant Multiplications on FPGA
AUTORES: Levent Aksoy; Paulo Flores; Jose Monteiro;
PUBLICAÇÃO: 2014, FONTE: 32nd IEEE International Conference on Computer Design (ICCD) in 2014 32ND IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD)
AUTORES: Levent Aksoy; Paulo Flores; Jose Monteiro;
PUBLICAÇÃO: 2014, FONTE: 32nd IEEE International Conference on Computer Design (ICCD) in 2014 32ND IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD)
INDEXADO EM: 
WOS
WOS23
TÃTULO: Optimization of design complexity in time-multiplexed constant multiplications
AUTORES: Levent Aksoy; Paulo Flores; Jose Monteiro;
PUBLICAÇÃO: 2014, FONTE: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014
AUTORES: Levent Aksoy; Paulo Flores; Jose Monteiro;
PUBLICAÇÃO: 2014, FONTE: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014
24
TÃTULO: Exploration of tradeoffs in the design of integer cosine transforms for image compression
AUTORES: Aksoy, L; Costa, E; Flores, P; Monteiro, J;
PUBLICAÇÃO: 2013, FONTE: 2013 European Conference on Circuit Theory and Design, ECCTD 2013 in 2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings
AUTORES: Aksoy, L; Costa, E; Flores, P; Monteiro, J;
PUBLICAÇÃO: 2013, FONTE: 2013 European Conference on Circuit Theory and Design, ECCTD 2013 in 2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings
25
TÃTULO: SIREN. a depth-first search algorithm for the filter design optimization problem
AUTORES: Levent Aksoy; Paulo Flores; José Monteiro;
PUBLICAÇÃO: 2013, FONTE: Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI - GLSVLSI '13
AUTORES: Levent Aksoy; Paulo Flores; José Monteiro;
PUBLICAÇÃO: 2013, FONTE: Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI - GLSVLSI '13
26
TÃTULO: Combination of radix-2<sup>m</sup> multiplier blocks and adder compressors for the design of efficient 2's complement 64-bit array multipliers
AUTORES: Leandro Zafalon Pieper; Eduardo A C da Costa; Jose C Monteiro;
PUBLICAÇÃO: 2013, FONTE: 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI)
AUTORES: Leandro Zafalon Pieper; Eduardo A C da Costa; Jose C Monteiro;
PUBLICAÇÃO: 2013, FONTE: 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI)
27
TÃTULO: Design and Characterization of a QLUT in a Standard CMOS Process
AUTORES: Diogo Brito; Jorge Fernandes; Paulo Flores; Jose Monteiro;
PUBLICAÇÃO: 2012, FONTE: 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) in 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
AUTORES: Diogo Brito; Jorge Fernandes; Paulo Flores; Jose Monteiro;
PUBLICAÇÃO: 2012, FONTE: 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) in 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
INDEXADO EM: WOS
WOS28
TÃTULO: Efficient Area and Power Multiplication Part of FFT Based on Twiddle Factor Decomposition
AUTORES: Sidinei Ghissoni; Eduardo Costa; Jose Monteiro; Ricardo Reis;
PUBLICAÇÃO: 2012, FONTE: 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) in 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
AUTORES: Sidinei Ghissoni; Eduardo Costa; Jose Monteiro; Ricardo Reis;
PUBLICAÇÃO: 2012, FONTE: 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) in 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
INDEXADO EM: WOS
WOS29
TÃTULO: Design of Low-Complexity Digital Finite Impulse Response Filters on FPGAs
AUTORES: Levent Aksoy; Eduardo Costa; Paulo Flores; Jose Monteiro;
PUBLICAÇÃO: 2012, FONTE: Design, Automation and Test in Europe Conference and Exhibition (DATE) in DESIGN, AUTOMATION & TEST IN EUROPE (DATE 2012)
AUTORES: Levent Aksoy; Eduardo Costa; Paulo Flores; Jose Monteiro;
PUBLICAÇÃO: 2012, FONTE: Design, Automation and Test in Europe Conference and Exhibition (DATE) in DESIGN, AUTOMATION & TEST IN EUROPE (DATE 2012)
INDEXADO EM: WOS
WOS30
TÃTULO: Power macro-modeling using an iterative LS-SVM method
AUTORES: Gusmão, A; Silveira, L. Miguel ; Monteiro, J;
PUBLICAÇÃO: 2011, FONTE: 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009 in IFIP Advances in Information and Communication Technology, VOLUME: 360
AUTORES: Gusmão, A; Silveira, L. Miguel ; Monteiro, J;
PUBLICAÇÃO: 2011, FONTE: 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009 in IFIP Advances in Information and Communication Technology, VOLUME: 360
