Partial Data Reuse for Nested Loop Computations: Design Space Exploration for Fpga Implementations

AuthID
 P-004-3NB
2
Author(s)
Park, J
·
Tipo de Documento
Article
Year published
2008
Publicado
in INTERNATIONAL JOURNAL OF ELECTRONICS, ISSN: 0020-7217
Volume: 95, Número: 7, Páginas: 705-723 (19)
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Publication Identifiers
SCOPUS: 2-s2.0-49149121973
Wos: WOS:000258090200008
Source Identifiers
ISSN: 0020-7217
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