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Efficient Implementation of a Single-Precision Floating-Point Arithmetic Unit on Fpga

AuthID
P-009-Z9G

Author(s)

Jose, W

Silva, AR

Neto, H

Vestias, M

Tipo de Documento

Proceedings Paper

Year published

2014

Publicado

in Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014

Conference

24Th International Conference on Field Programmable Logic and Applications, Fpl 2014, Date: 1 September 2014 through 5 September 2014, Patrocinadores: Altera;BEEcube;Cadence;et al.;Sigasi;Xilinx

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Metadata
Fontes

Publication Identifiers

DOI: 10.1109/fpl.2014.6927391

Handle: https://hdl.handle.net/10400.21/4799

SCOPUS: 2-s2.0-84911058653

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Efficient Implementation of a Single-Precision Floating-Point Arithmetic Unit on Fpga

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Efficient Implementation of a Single-Precision Floating-Point Arithmetic Unit on Fpga

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