A Reduced-Bias Approach With a Lightweight Hard-Multiple Generator to Design a Radix-8 Modulo 2N + 1 Multiplier

AuthID
 P-00M-YK3
5
Author(s)
Mirhosseini, SM
·
Molahosseini, AS
·
Hosseinzadeh, M
·
Martins, P
Tipo de Documento
Article
Year published
2017
Publicado
in IEEE Trans. on Circuits and Systems
Volume: 64, Número: 7, Páginas: 817-821
Indexing
Dblp®/pt/publications/view/686691
Publication Identifiers
DBLP: journals/tcas/MirhosseiniMHSM17
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