Stretching the Capacity of Hardware Transactional Memory in Ibm Power Architectures

AuthID
 P-00W-QDP
4
Author(s)
Filipe, R
·
Issa, S
·
Romano, P
·
2
Editor(es)
Hollingsworth,JK;Keidar,I
Tipo de Documento
Proceedings Paper
Year published
2019
Publicado
in Proceedings of the 24th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP 2019, Washington, DC, USA, February 16-20, 2019 in PPoPP
Páginas: 107-119
Indexing
Dblp®/pt/publications/view/941494
Publication Identifiers
DBLP: conf/ppopp/FilipeI0019
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