A 6-To-38Gb/S Capture-Range Bang-Bang Clock and Data Recovery Circuit with Deliberate-Current-Mismatch Frequency Detection and Interpolation-Based Multiphase Clock Generation

AuthID
 P-00X-RVN
8
Author(s)
Wang, L
·
Chen, Y
·
Yang, CW
·
Zhou, XH
·
Han, M
·
Stefano, CP
·
Tipo de Documento
Article in Press
Year published
2023
Publicado
in INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, ISSN: 0098-9886
Indexing
Wos®
Scopus®
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Publication Identifiers
SCOPUS: 2-s2.0-85145743099
Wos: WOS:000907527400001
Source Identifiers
ISSN: 0098-9886
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