Jorge Filipe Leal Costa Semião


AuthID: R-001-F67

Confirmed Publications: 65



31
TITLE: Aging-Aware Power or Frequency Tuning With Predictive Fault Detection  Full Text
AUTHORS: Jackson Pachito; Celestino V Martins; Bruno Jacinto; Isabel C Teixeira ; Joao Paulo Teixeira ; Jorge Semião ; Julio C Vazquez; Victor Champac; Marcelino B Santos ;
PUBLISHED: 2012, SOURCE: IEEE DESIGN & TEST OF COMPUTERS, VOLUME: 29, ISSUE: 5
INDEXED IN: Scopus WOS CrossRef
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32
TITLE: Modeling the Effect of Process, Power-Supply Voltage and Temperature Variations on the Timing Response of Nanometer Digital Circuits  Full Text
AUTHORS: Judit F Freijedo; Jorge Semião ; Juan J Rodriguez Andina; Fabian Vargas; Isabel C Teixeira ; Paulo Teixeira, JP ;
PUBLISHED: 2012, SOURCE: JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, VOLUME: 28, ISSUE: 4
INDEXED IN: Scopus WOS CrossRef
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33
TITLE: The Influence of Clock-Gating On NBTI-Induced Delay Degradation
AUTHORS: Pachito, J; Martins, CV; Jorge Semião ; Santos, M ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2012, SOURCE: IEEE 18th International On-Line Testing Symposium (IOLTS) in 2012 IEEE 18TH INTERNATIONAL ON-LINE TESTING SYMPOSIUM (IOLTS)
INDEXED IN: Scopus WOS CrossRef
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34
TITLE: Adaptive Error-Prediction Flip-flop for Performance Failure Prediction with Aging Sensors
AUTHORS: Martins, CV; Jorge Semião ; Vazquez, JC; Champac, V; Santos, M ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2011, SOURCE: 29th IEEE VLSI Test Symposium (VTS)/Workshop on Design for Reliability and Variability (DRV) in 2011 IEEE 29TH VLSI TEST SYMPOSIUM (VTS)
INDEXED IN: Scopus WOS CrossRef
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35
TITLE: IP core to leverage RTOS-based embedded systems reliability to electromagnetic interference
AUTHORS: Silva, D; Poehls, LB; Jorge Semião ; Teixeira, IC ; Teixeira, JP ; Valdes, M; Freijedo, J; Rodriguez Andina, JJ; Vargas, F;
PUBLISHED: 2011, SOURCE: 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits, EMC COMPO 2011 in Proceedings of the 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits 2011, EMC COMPO 2011
INDEXED IN: Scopus
IN MY: ORCID
36
TITLE: Lower V DD operation of FPGA-based digital circuits through delay modeling and time borrowing
AUTHORS: Freijedo, J; Valdes, MD; Costas, L; Moure, MJ; Rodriguez Andina, JJ; Jorge Semião ; Vargas, F; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2011, SOURCE: Journal of Low Power Electronics, VOLUME: 7, ISSUE: 2
INDEXED IN: Scopus CrossRef
IN MY: ORCID
37
TITLE: Modeling the effect of process variations on the timing response of nanometer digital circuits
AUTHORS: Freijedo, J; Jorge Semião ; Rodriguez Andina, JJ; Vargas, F; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2011, SOURCE: 12th IEEE Latin-American Test Workshop, LATW 2011 in LATW 2011 - 12th IEEE Latin-American Test Workshop
INDEXED IN: Scopus CrossRef
IN MY: ORCID
38
TITLE: On-line BIST for performance failure prediction under aging effects in automotive safety-critical applications
AUTHORS: Oliveira, RS; Jorge Semião ; Teixeira, IC ; Santos, MB ; Teixeira, JP ;
PUBLISHED: 2011, SOURCE: 12th IEEE Latin-American Test Workshop, LATW 2011 in LATW 2011 - 12th IEEE Latin-American Test Workshop
INDEXED IN: Scopus CrossRef
IN MY: ORCID
39
TITLE: On-line BIST for performance failure prediction under NBTI-induced aging in safety-critical applications
AUTHORS: Oliveira, RS; Jorge Semião ; Teixeira, IC ; Santos, MB ; Teixeira, JP ;
PUBLISHED: 2011, SOURCE: Journal of Low Power Electronics, VOLUME: 7, ISSUE: 4
INDEXED IN: Scopus CrossRef
IN MY: ORCID
40
TITLE: Performance failure prediction using built-in delay sensors in FPGAs
AUTHORS: Bexiga, V; Leong, C; Jorge Semião ; Ic Teixeira ; Teixeira, JP ; Valdes, M; Freijedo, J; Rodriguez Andina, JJ; Vargas, F;
PUBLISHED: 2011, SOURCE: 21st International Conference on Field Programmable Logic and Applications, FPL 2011 in Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011
INDEXED IN: Scopus CrossRef
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Page 4 of 7. Total results: 65.

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