Pedro Miguel Florindo Miguens Matutino
AuthID: R-001-J76
1
TITLE: Arithmetic-Based Binary-to-RNS Converter Modulo {2(n)+/- k} for jn-Bit Dynamic Range Full Text
AUTHORS: Matutino, PM; Chaves, R ; Sousa, L ;
PUBLISHED: 2015, SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 23, ISSUE: 3
AUTHORS: Matutino, PM; Chaves, R ; Sousa, L ;
PUBLISHED: 2015, SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 23, ISSUE: 3
INDEXED IN: 
Scopus 
WOS 
DBLP
Scopus WOS DBLP2
TITLE: Arithmetic-based binary-to-RNS converter modulo {2n±k} for -bit dynamic range
AUTHORS: Matutino, PM; Chaves, R; Sousa, L;
PUBLISHED: 2015, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, ISSUE: 3
AUTHORS: Matutino, PM; Chaves, R; Sousa, L;
PUBLISHED: 2015, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, ISSUE: 3
INDEXED IN: Scopus
Scopus3
TITLE: An Efficient Scalable RNS Architecture for Large Dynamic Ranges Full Text
AUTHORS: Pedro Miguens Matutino; Ricardo Chaves ; Leonel Sousa ;
PUBLISHED: 2014, SOURCE: JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, VOLUME: 77, ISSUE: 1-2
AUTHORS: Pedro Miguens Matutino; Ricardo Chaves ; Leonel Sousa ;
PUBLISHED: 2014, SOURCE: JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, VOLUME: 77, ISSUE: 1-2
4
TITLE: Arithmetic-Based Binary-to-RNS Converter Modulo {2n ±k} for jn-Bit Dynamic Range Full Text
AUTHORS: Matutino, PM; Chaves, R ; Sousa, L ;
PUBLISHED: 2014, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, ISSUE: 3
AUTHORS: Matutino, PM; Chaves, R ; Sousa, L ;
PUBLISHED: 2014, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, ISSUE: 3
5
TITLE: Virtual Laboratory for Educational Environments
AUTHORS: Fabio Dias; Pedro Miguens Matutino; Manuel Barata;
PUBLISHED: 2014, SOURCE: 11th International Conference on Remote Engineering and Virtual Instrumentation (REV) in 2014 11TH INTERNATIONAL CONFERENCE ON REMOTE ENGINEERING AND VIRTUAL INSTRUMENTATION (REV)
AUTHORS: Fabio Dias; Pedro Miguens Matutino; Manuel Barata;
PUBLISHED: 2014, SOURCE: 11th International Conference on Remote Engineering and Virtual Instrumentation (REV) in 2014 11TH INTERNATIONAL CONFERENCE ON REMOTE ENGINEERING AND VIRTUAL INSTRUMENTATION (REV)
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TITLE: ROM-less RNS-to-binary converter moduli {2(2n)-1, 2(2n)+1, 2(n)-3, 2(n)+3}
AUTHORS: Pedro Miguens Matutino; Ricardo Chaves; Leonel Sousa;
PUBLISHED: 2014, SOURCE: 14 International Symposium on Integrated Circuits (ISIC) in 2014 14TH INTERNATIONAL SYMPOSIUM ON INTEGRATED CIRCUITS (ISIC)
AUTHORS: Pedro Miguens Matutino; Ricardo Chaves; Leonel Sousa;
PUBLISHED: 2014, SOURCE: 14 International Symposium on Integrated Circuits (ISIC) in 2014 14TH INTERNATIONAL SYMPOSIUM ON INTEGRATED CIRCUITS (ISIC)
INDEXED IN: WOS
WOS7
TITLE: A Compact and Scalable RNS Architecture Full Text
AUTHORS: Pedro Miguens Matutino; Ricardo Chaves ; Leonel Sousa ;
PUBLISHED: 2013, SOURCE: IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP) in PROCEEDINGS OF THE 2013 IEEE 24TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP 13)
AUTHORS: Pedro Miguens Matutino; Ricardo Chaves ; Leonel Sousa ;
PUBLISHED: 2013, SOURCE: IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP) in PROCEEDINGS OF THE 2013 IEEE 24TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP 13)
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TITLE: RNS arithmetic units for modulo {2n±k}
AUTHORS: Matutino, PM; Pettenghi, H ; Chaves, R ; Sousa, L ;
PUBLISHED: 2012, SOURCE: 15th Euromicro Conference on Digital System Design, DSD 2012 in Proceedings - 15th Euromicro Conference on Digital System Design, DSD 2012
AUTHORS: Matutino, PM; Pettenghi, H ; Chaves, R ; Sousa, L ;
PUBLISHED: 2012, SOURCE: 15th Euromicro Conference on Digital System Design, DSD 2012 in Proceedings - 15th Euromicro Conference on Digital System Design, DSD 2012
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TITLE: Binary-to-RNS conversion units for moduli {2n ± 3}
AUTHORS: Matutino, PM; Chaves, R ; Sousa, L ;
PUBLISHED: 2011, SOURCE: 2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011 in Proceedings - 2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011
AUTHORS: Matutino, PM; Chaves, R ; Sousa, L ;
PUBLISHED: 2011, SOURCE: 2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011 in Proceedings - 2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011
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TITLE: Arithmetic units for RNS moduli {2(n)-3} and {2(n)+3} operations
AUTHORS: Pedro Miguens Matutino; Ricardo Chaves ; Leonel Sousa ;
PUBLISHED: 2010, SOURCE: 13th Euromicro Conference on Digital System Design on Architectures, Methods and Tools in 13TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN: ARCHITECTURES, METHODS AND TOOLS
AUTHORS: Pedro Miguens Matutino; Ricardo Chaves ; Leonel Sousa ;
PUBLISHED: 2010, SOURCE: 13th Euromicro Conference on Digital System Design on Architectures, Methods and Tools in 13TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN: ARCHITECTURES, METHODS AND TOOLS
