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TÍTULO: Design Automation Tasks Scheduling for Enhanced Parallel Execution of a State-of-the-Art Layout-Aware Sizing Approach  Full Text
AUTORES: David Neves; Ricardo Martins ; Nuno Lourenco ; Nuno Horta ;
PUBLICAÇÃO: 2016, FONTE: Design, Automation and Test in Europe Conference and Exhibition (DATE) in PROCEEDINGS OF THE 2016 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE)
INDEXADO EM: Scopus WOS
NO MEU: ORCID
32
TÍTULO: AIDA-PEx: Accurate Parasitic Extraction for Layout-Aware Analog Integrated Circuit Sizing
AUTORES: Bruno Cardoso; Ricardo Martins ; Nuno Lourenco ; Nuno Horta ;
PUBLICAÇÃO: 2015, FONTE: 2015 11th Conference on PhD Res in Microelect & Elect PRIME in 2015 11TH CONFERENCE ON PH.D. RESEARCH IN MICROELECTRONICS AND ELECTRONICS (PRIME)
INDEXADO EM: Scopus WOS CrossRef
NO MEU: ORCID
33
TÍTULO: AIDA: Robust Layout-Aware Synthesis of Analog ICs including Sizing and Layout Generation
AUTORES: Ricardo Martins ; Nuno Lourenco ; Antonio Canelas; Ricardo Povoa; Nuno Horta ;
PUBLICAÇÃO: 2015, FONTE: International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) in 2015 INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
INDEXADO EM: Scopus WOS CrossRef: 16
NO MEU: ORCID
34
TÍTULO: Analog IC Placement using Absolute Coordinates and a Hierarchical Combination of Pareto Optimal Fronts
AUTORES: Ricardo Martins ; Nuno Lourenco ; Nuno Horta ;
PUBLICAÇÃO: 2015, FONTE: 2015 11th Conference on PhD Res in Microelect & Elect PRIME in 2015 11TH CONFERENCE ON PH.D. RESEARCH IN MICROELECTRONICS AND ELECTRONICS (PRIME)
INDEXADO EM: Scopus WOS CrossRef
NO MEU: ORCID
35
TÍTULO: Embedding Fault List Compression Techniques in a Design Automation Framework for Analog and Mixed-Signal Structural Testing
AUTORES: Ricardo Martins ; Nuno Lourenco ; Nuno Horta ; Nuno Guerreiro; Marcelino Santos;
PUBLICAÇÃO: 2015, FONTE: 2015 Conference on Design of Circuits and Integrated Systems (DCIS) in 2015 Conference on Design of Circuits and Integrated Systems (DCIS)
INDEXADO EM: Scopus WOS CrossRef
NO MEU: ORCID
36
TÍTULO: Exploring Design Tradeoffs in Analog IC Placement with Current-Flow & Current-Density Considerations
AUTORES: Ricardo Martins ; Ricardo Povoa; Nuno Lourenco ; Nuno Horta ;
PUBLICAÇÃO: 2015, FONTE: International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) in 2015 INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
INDEXADO EM: Scopus WOS CrossRef
NO MEU: ORCID
37
TÍTULO: Extraction and Application of Wiring Symmetry Rules to Route Analog Multiport Terminals
AUTORES: Ricardo Martins ; Nuno Lourenco ; Antonio Canelas; Nuno Horta ;
PUBLICAÇÃO: 2015, FONTE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLUME: 2015-July
INDEXADO EM: Scopus WOS CrossRef: 1
NO MEU: ORCID
38
TÍTULO: Floorplan-aware analog IC sizing and optimization based on topological constraints  Full Text
AUTORES: Nuno Lourenco ; Antonio Canelas; Ricardo Povoa; Ricardo Martins ; Nuno Horta ;
PUBLICAÇÃO: 2015, FONTE: INTEGRATION-THE VLSI JOURNAL, VOLUME: 48, NÚMERO: 1
INDEXADO EM: Scopus WOS CrossRef: 19
NO MEU: ORCID
39
TÍTULO: Layout-Aware Sizing of Analog ICs using Floorplan & Routing Estimates for Parasitic Extraction
AUTORES: Lourenco, N ; Martins, R ; Horta, N ;
PUBLICAÇÃO: 2015, FONTE: Conference on Design Automation Test in Europe (DATE) in 2015 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), VOLUME: 2015-April
INDEXADO EM: Scopus WOS
NO MEU: ORCID
40
TÍTULO: Multi-objective optimization of analog integrated circuit placement hierarchy in absolute coordinates  Full Text
AUTORES: Ricardo Martins ; Nuno Lourenco ; Nuno Horta ;
PUBLICAÇÃO: 2015, FONTE: EXPERT SYSTEMS WITH APPLICATIONS, VOLUME: 42, NÚMERO: 23
INDEXADO EM: Scopus WOS CrossRef
NO MEU: ORCID
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