Mário Pereira Véstias
AuthID: R-000-CZ3
71
TÃTULO: Enhancing stochastic computations via process variation
AUTORES: Duarte, RP; Véstias, M; Neto, H;
PUBLICAÇÃO: 2015, FONTE: 25th International Conference on Field Programmable Logic and Applications, FPL 2015 in 25th International Conference on Field Programmable Logic and Applications, FPL 2015
AUTORES: Duarte, RP; Véstias, M; Neto, H;
PUBLICAÇÃO: 2015, FONTE: 25th International Conference on Field Programmable Logic and Applications, FPL 2015 in 25th International Conference on Field Programmable Logic and Applications, FPL 2015
72
TÃTULO: FPGA-based architecture for hyperspectral unmixing
AUTORES: Nascimento, JMP; Vestias, M; Martin, G;
PUBLICAÇÃO: 2015, FONTE: IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2015 in International Geoscience and Remote Sensing Symposium (IGARSS), VOLUME: 2015-November
AUTORES: Nascimento, JMP; Vestias, M; Martin, G;
PUBLICAÇÃO: 2015, FONTE: IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2015 in International Geoscience and Remote Sensing Symposium (IGARSS), VOLUME: 2015-November
73
TÃTULO: Enhancing Stochastic Computations via Process Variation
AUTORES: Rui Policarpo Duarte; Mario Vestias; Horacio Neto;
PUBLICAÇÃO: 2015, FONTE: 25th International Conference on Field Programmable Logic and Applications in 2015 25TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS
AUTORES: Rui Policarpo Duarte; Mario Vestias; Horacio Neto;
PUBLICAÇÃO: 2015, FONTE: 25th International Conference on Field Programmable Logic and Applications in 2015 25TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS
INDEXADO EM: 
WOS
WOS NO MEU: 
ORCID
ORCID74
TÃTULO: Efficient implementation of a single-precision floating-point arithmetic unit on FPGA
AUTORES: Jose, W; Silva, AR; Neto, H; Vestias, M;
PUBLICAÇÃO: 2014, FONTE: 24th International Conference on Field Programmable Logic and Applications, FPL 2014 in Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014
AUTORES: Jose, W; Silva, AR; Neto, H; Vestias, M;
PUBLICAÇÃO: 2014, FONTE: 24th International Conference on Field Programmable Logic and Applications, FPL 2014 in Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014
75
TÃTULO: Trends of CPU, GPU and FPGA for high-performance computing
AUTORES: Vestias, M; Neto, H;
PUBLICAÇÃO: 2014, FONTE: 24th International Conference on Field Programmable Logic and Applications, FPL 2014 in Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014
AUTORES: Vestias, M; Neto, H;
PUBLICAÇÃO: 2014, FONTE: 24th International Conference on Field Programmable Logic and Applications, FPL 2014 in Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014
76
TÃTULO: FPGA-based Architecture for Hyperspectral Endmember Extraction
AUTORES: Rosario, J; Nascimento, JMP; Vestias, M;
PUBLICAÇÃO: 2014, FONTE: Conference on High-Performance Computing in Remote Sensing IV in HIGH-PERFORMANCE COMPUTING IN REMOTE SENSING IV, VOLUME: 9247
AUTORES: Rosario, J; Nascimento, JMP; Vestias, M;
PUBLICAÇÃO: 2014, FONTE: Conference on High-Performance Computing in Remote Sensing IV in HIGH-PERFORMANCE COMPUTING IN REMOTE SENSING IV, VOLUME: 9247
INDEXADO EM: 
Scopus WOS
Scopus WOS NO MEU: ORCID
ORCID77
TÃTULO: MULTI-GNSS RECEIVER FOR AEROSPACE NAVIGATION AND POSITIONING APPLICATIONS
AUTORES: Peres, TR; Silva, JS; Silva, PF; Carona, D; Serrador, A; Palhinha, F; Pereira, R; Vestias, M;
PUBLICAÇÃO: 2014, FONTE: European Calibration and Orientation Workshop (EuroCOW) in EUROPEAN CALIBRATION AND ORIENTATION WORKSHOP (EUROCOW 2014), VOLUME: 40, NÚMERO: 3W1
AUTORES: Peres, TR; Silva, JS; Silva, PF; Carona, D; Serrador, A; Palhinha, F; Pereira, R; Vestias, M;
PUBLICAÇÃO: 2014, FONTE: European Calibration and Orientation Workshop (EuroCOW) in EUROPEAN CALIBRATION AND ORIENTATION WORKSHOP (EUROCOW 2014), VOLUME: 40, NÚMERO: 3W1
78
TÃTULO: RF FRONT END RECEIVER FOR GPS/GALILEO L1/E1
AUTORES: Filipe Palhinha; Ricardo Pereira; Duarte Carona; Antonio Serrador; Mario Vestias; Joao Silva; Tiago Peres; Pedro Silva;
PUBLICAÇÃO: 2014, FONTE: 2nd Conference on Electronics, Telecommunications, and Computers (CETC) in CONFERENCE ON ELECTRONICS, TELECOMMUNICATIONS AND COMPUTERS - CETC 2013, VOLUME: 17
AUTORES: Filipe Palhinha; Ricardo Pereira; Duarte Carona; Antonio Serrador; Mario Vestias; Joao Silva; Tiago Peres; Pedro Silva;
PUBLICAÇÃO: 2014, FONTE: 2nd Conference on Electronics, Telecommunications, and Computers (CETC) in CONFERENCE ON ELECTRONICS, TELECOMMUNICATIONS AND COMPUTERS - CETC 2013, VOLUME: 17
79
TÃTULO: Modeling and Simulation of a Many-Core Architecture Using SystemC
AUTORES: Ana Rita Silva; Wilson Jose; Horacio Neto; Mario Vestias;
PUBLICAÇÃO: 2014, FONTE: 2nd Conference on Electronics, Telecommunications, and Computers (CETC) in CONFERENCE ON ELECTRONICS, TELECOMMUNICATIONS AND COMPUTERS - CETC 2013, VOLUME: 17
AUTORES: Ana Rita Silva; Wilson Jose; Horacio Neto; Mario Vestias;
PUBLICAÇÃO: 2014, FONTE: 2nd Conference on Electronics, Telecommunications, and Computers (CETC) in CONFERENCE ON ELECTRONICS, TELECOMMUNICATIONS AND COMPUTERS - CETC 2013, VOLUME: 17
80
TÃTULO: Algorithm-oriented design of efficient many-core architectures applied to dense matrix multiplication
AUTORES: Wilson M José; Ana Rita Silva; Mário P Véstias; Horácio C Neto;
PUBLICAÇÃO: 2014, FONTE: Analog Integrated Circuits and Signal Processing - Analog Integr Circ Sig Process, VOLUME: 82, NÚMERO: 1
AUTORES: Wilson M José; Ana Rita Silva; Mário P Véstias; Horácio C Neto;
PUBLICAÇÃO: 2014, FONTE: Analog Integrated Circuits and Signal Processing - Analog Integr Circ Sig Process, VOLUME: 82, NÚMERO: 1
