Pedro Miguel Florindo Miguens Matutino
AuthID: R-001-J76
1
TÃTULO: Arithmetic-Based Binary-to-RNS Converter Modulo {2(n)+/- k} for jn-Bit Dynamic Range Full Text
AUTORES: Matutino, PM; Chaves, R ; Sousa, L ;
PUBLICAÇÃO: 2015, FONTE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 23, NÚMERO: 3
AUTORES: Matutino, PM; Chaves, R ; Sousa, L ;
PUBLICAÇÃO: 2015, FONTE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 23, NÚMERO: 3
INDEXADO EM: 
Scopus 
WOS 
DBLP
Scopus WOS DBLP2
TÃTULO: Arithmetic-based binary-to-RNS converter modulo {2n±k} for -bit dynamic range
AUTORES: Matutino, PM; Chaves, R; Sousa, L;
PUBLICAÇÃO: 2015, FONTE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, NÚMERO: 3
AUTORES: Matutino, PM; Chaves, R; Sousa, L;
PUBLICAÇÃO: 2015, FONTE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, NÚMERO: 3
INDEXADO EM: Scopus
Scopus3
TÃTULO: An Efficient Scalable RNS Architecture for Large Dynamic Ranges Full Text
AUTORES: Pedro Miguens Matutino; Ricardo Chaves ; Leonel Sousa ;
PUBLICAÇÃO: 2014, FONTE: JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, VOLUME: 77, NÚMERO: 1-2
AUTORES: Pedro Miguens Matutino; Ricardo Chaves ; Leonel Sousa ;
PUBLICAÇÃO: 2014, FONTE: JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, VOLUME: 77, NÚMERO: 1-2
4
TÃTULO: Arithmetic-Based Binary-to-RNS Converter Modulo {2n ±k} for jn-Bit Dynamic Range Full Text
AUTORES: Matutino, PM; Chaves, R ; Sousa, L ;
PUBLICAÇÃO: 2014, FONTE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, NÚMERO: 3
AUTORES: Matutino, PM; Chaves, R ; Sousa, L ;
PUBLICAÇÃO: 2014, FONTE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, NÚMERO: 3
5
TÃTULO: Virtual Laboratory for Educational Environments
AUTORES: Fabio Dias; Pedro Miguens Matutino; Manuel Barata;
PUBLICAÇÃO: 2014, FONTE: 11th International Conference on Remote Engineering and Virtual Instrumentation (REV) in 2014 11TH INTERNATIONAL CONFERENCE ON REMOTE ENGINEERING AND VIRTUAL INSTRUMENTATION (REV)
AUTORES: Fabio Dias; Pedro Miguens Matutino; Manuel Barata;
PUBLICAÇÃO: 2014, FONTE: 11th International Conference on Remote Engineering and Virtual Instrumentation (REV) in 2014 11TH INTERNATIONAL CONFERENCE ON REMOTE ENGINEERING AND VIRTUAL INSTRUMENTATION (REV)
6
TÃTULO: ROM-less RNS-to-binary converter moduli {2(2n)-1, 2(2n)+1, 2(n)-3, 2(n)+3}
AUTORES: Pedro Miguens Matutino; Ricardo Chaves; Leonel Sousa;
PUBLICAÇÃO: 2014, FONTE: 14 International Symposium on Integrated Circuits (ISIC) in 2014 14TH INTERNATIONAL SYMPOSIUM ON INTEGRATED CIRCUITS (ISIC)
AUTORES: Pedro Miguens Matutino; Ricardo Chaves; Leonel Sousa;
PUBLICAÇÃO: 2014, FONTE: 14 International Symposium on Integrated Circuits (ISIC) in 2014 14TH INTERNATIONAL SYMPOSIUM ON INTEGRATED CIRCUITS (ISIC)
INDEXADO EM: WOS
WOS7
TÃTULO: A Compact and Scalable RNS Architecture Full Text
AUTORES: Pedro Miguens Matutino; Ricardo Chaves ; Leonel Sousa ;
PUBLICAÇÃO: 2013, FONTE: IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP) in PROCEEDINGS OF THE 2013 IEEE 24TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP 13)
AUTORES: Pedro Miguens Matutino; Ricardo Chaves ; Leonel Sousa ;
PUBLICAÇÃO: 2013, FONTE: IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP) in PROCEEDINGS OF THE 2013 IEEE 24TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP 13)
8
TÃTULO: RNS arithmetic units for modulo {2n±k}
AUTORES: Matutino, PM; Pettenghi, H ; Chaves, R ; Sousa, L ;
PUBLICAÇÃO: 2012, FONTE: 15th Euromicro Conference on Digital System Design, DSD 2012 in Proceedings - 15th Euromicro Conference on Digital System Design, DSD 2012
AUTORES: Matutino, PM; Pettenghi, H ; Chaves, R ; Sousa, L ;
PUBLICAÇÃO: 2012, FONTE: 15th Euromicro Conference on Digital System Design, DSD 2012 in Proceedings - 15th Euromicro Conference on Digital System Design, DSD 2012
9
TÃTULO: Binary-to-RNS conversion units for moduli {2n ± 3}
AUTORES: Matutino, PM; Chaves, R ; Sousa, L ;
PUBLICAÇÃO: 2011, FONTE: 2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011 in Proceedings - 2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011
AUTORES: Matutino, PM; Chaves, R ; Sousa, L ;
PUBLICAÇÃO: 2011, FONTE: 2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011 in Proceedings - 2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011
10
TÃTULO: Arithmetic units for RNS moduli {2(n)-3} and {2(n)+3} operations
AUTORES: Pedro Miguens Matutino; Ricardo Chaves ; Leonel Sousa ;
PUBLICAÇÃO: 2010, FONTE: 13th Euromicro Conference on Digital System Design on Architectures, Methods and Tools in 13TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN: ARCHITECTURES, METHODS AND TOOLS
AUTORES: Pedro Miguens Matutino; Ricardo Chaves ; Leonel Sousa ;
PUBLICAÇÃO: 2010, FONTE: 13th Euromicro Conference on Digital System Design on Architectures, Methods and Tools in 13TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN: ARCHITECTURES, METHODS AND TOOLS
