Jorge Manuel dos Santos Ribeiro Fernandes
AuthID: R-000-7S7
111
TÃTULO: A sub-ranging 2-Step 7-bit self-calibrated comparator-based binary-search ADC
AUTORES: Rabuske, F; Rabuske, T; Fernandes, J;
PUBLICAÇÃO: 2014, FONTE: 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 in Proceedings - IEEE International Symposium on Circuits and Systems
AUTORES: Rabuske, F; Rabuske, T; Fernandes, J;
PUBLICAÇÃO: 2014, FONTE: 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 in Proceedings - IEEE International Symposium on Circuits and Systems
112
TÃTULO: Noise-aware simulation-based sizing and optimization of clocked comparators Full Text
AUTORES: Taimur Rabuske; Jorge Fernandes;
PUBLICAÇÃO: 2014, FONTE: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 81, NÚMERO: 3
AUTORES: Taimur Rabuske; Jorge Fernandes;
PUBLICAÇÃO: 2014, FONTE: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 81, NÚMERO: 3
INDEXADO EM: 
Scopus 
WOS
Scopus WOS NO MEU: 
ORCID
ORCID113
TÃTULO: Combination of a geolocation database access with infrastructure sensing in TV bands
AUTORES: Dionisio, R ; Ribeiro, J; Marques, P; Rodriguez, J ;
PUBLICAÇÃO: 2014, FONTE: EURASIP JOURNAL ON WIRELESS COMMUNICATIONS AND NETWORKING, VOLUME: 2014, NÚMERO: 1
AUTORES: Dionisio, R ; Ribeiro, J; Marques, P; Rodriguez, J ;
PUBLICAÇÃO: 2014, FONTE: EURASIP JOURNAL ON WIRELESS COMMUNICATIONS AND NETWORKING, VOLUME: 2014, NÚMERO: 1
114
TÃTULO: Improving Transfer Learning Accuracy by Reusing Stacked Denoising Autoencoders Full Text
AUTORES: Kandaswamy, C; Silva, LM ; Alexandre, LA ; Sousa, R; Santos, JM; de Sa, JM;
PUBLICAÇÃO: 2014, FONTE: IEEE International Conference on Systems, Man, and Cybernetics (SMC) in 2014 IEEE INTERNATIONAL CONFERENCE ON SYSTEMS, MAN AND CYBERNETICS (SMC), VOLUME: 2014-January, NÚMERO: January
AUTORES: Kandaswamy, C; Silva, LM ; Alexandre, LA ; Sousa, R; Santos, JM; de Sa, JM;
PUBLICAÇÃO: 2014, FONTE: IEEE International Conference on Systems, Man, and Cybernetics (SMC) in 2014 IEEE INTERNATIONAL CONFERENCE ON SYSTEMS, MAN AND CYBERNETICS (SMC), VOLUME: 2014-January, NÚMERO: January
115
TÃTULO: Noise-aware simulation-based sizing and optimization of clocked comparators Full Text
AUTORES: Rabuske, T; Fernandes, J;
PUBLICAÇÃO: 2014, FONTE: Analog Integrated Circuits and Signal Processing, VOLUME: 81, NÚMERO: 3
AUTORES: Rabuske, T; Fernandes, J;
PUBLICAÇÃO: 2014, FONTE: Analog Integrated Circuits and Signal Processing, VOLUME: 81, NÚMERO: 3
116
TÃTULO: Automated PECVD System for Fabrication of a-Si:H Devices
AUTORES: Fernandes, M; Vygranenko, Y; Macarico, AF; Vieira, M;
PUBLICAÇÃO: 2014, FONTE: 2nd Conference on Electronics, Telecommunications, and Computers (CETC) in CONFERENCE ON ELECTRONICS, TELECOMMUNICATIONS AND COMPUTERS - CETC 2013, VOLUME: 17
AUTORES: Fernandes, M; Vygranenko, Y; Macarico, AF; Vieira, M;
PUBLICAÇÃO: 2014, FONTE: 2nd Conference on Electronics, Telecommunications, and Computers (CETC) in CONFERENCE ON ELECTRONICS, TELECOMMUNICATIONS AND COMPUTERS - CETC 2013, VOLUME: 17
INDEXADO EM: WOS 
CrossRef
WOS CrossRef117
TÃTULO: A Sub-Ranging 2-Step 7-bit Self-Calibrated Comparator-Based Binary-Search ADC
AUTORES: Fabio Rabuske; Taimur Rabuske; Jorge Fernandes;
PUBLICAÇÃO: 2014, FONTE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
AUTORES: Fabio Rabuske; Taimur Rabuske; Jorge Fernandes;
PUBLICAÇÃO: 2014, FONTE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
INDEXADO EM: WOS
WOS118
TÃTULO: Comparator-based binary-search ADC architectures for UWB receivers Full Text
AUTORES: Taimur Rabuske; Fabio Rabuske; Jorge Fernandes; Cesar Rodrigues; Diogo Brito;
PUBLICAÇÃO: 2013, FONTE: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 77, NÚMERO: 3
AUTORES: Taimur Rabuske; Fabio Rabuske; Jorge Fernandes; Cesar Rodrigues; Diogo Brito;
PUBLICAÇÃO: 2013, FONTE: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 77, NÚMERO: 3
119
TÃTULO: A reconfigurable computing architecture using magnetic tunneling junction memories
AUTORES: Silva, V; Fernandes, J; Vestias, M; Neto, H;
PUBLICAÇÃO: 2013, FONTE: 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 in 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings
AUTORES: Silva, V; Fernandes, J; Vestias, M; Neto, H;
PUBLICAÇÃO: 2013, FONTE: 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 in 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings
120
TÃTULO: A RECONFIGURABLE COMPUTING ARCHITECTURE USING MAGNETIC TUNNELING JUNCTION MEMORIES
AUTORES: Victor Silva; Jorge Fernandes; Mario Vestias; Horacio Neto;
PUBLICAÇÃO: 2013, FONTE: 23rd International Conference on Field Programmable Logic and Applications (FPL) in 2013 23RD INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL 2013) PROCEEDINGS
AUTORES: Victor Silva; Jorge Fernandes; Mario Vestias; Horacio Neto;
PUBLICAÇÃO: 2013, FONTE: 23rd International Conference on Field Programmable Logic and Applications (FPL) in 2013 23RD INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL 2013) PROCEEDINGS
INDEXADO EM: WOS
WOS