José Carlos Alves Pereira Monteiro
AuthID: R-000-85F
31
TÃTULO: Hardware Implementation of a Centroid-based Localization Algorithm for Mobile Sensor Networks
AUTORES: Leonardo L Oliveira; Gustavo F Dessbesell; Joao B Martins; Jose Monteiro;
PUBLICAÇÃO: 2011, FONTE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2011 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
AUTORES: Leonardo L Oliveira; Gustavo F Dessbesell; Joao B Martins; Jose Monteiro;
PUBLICAÇÃO: 2011, FONTE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2011 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
INDEXADO EM: 
WOS
WOS32
TÃTULO: Optimization of Area and Delay at Gate-Level in Multiple Constant Multiplications
AUTORES: Levent Aksoy; Eduardo Costa; Paulo Flores; Jose Monteiro;
PUBLICAÇÃO: 2010, FONTE: 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools
AUTORES: Levent Aksoy; Eduardo Costa; Paulo Flores; Jose Monteiro;
PUBLICAÇÃO: 2010, FONTE: 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools
33
TÃTULO: CentroidM. a centroid-based localization algorithm for mobile sensor networks
AUTORES: Leonardo Londero de Oliveira; João Baptista Martins; Gustavo Fernando Dessbesell; José Monteiro;
PUBLICAÇÃO: 2010, FONTE: Proceedings of the 23rd symposium on Integrated circuits and system design - SBCCI '10
AUTORES: Leonardo Londero de Oliveira; João Baptista Martins; Gustavo Fernando Dessbesell; José Monteiro;
PUBLICAÇÃO: 2010, FONTE: Proceedings of the 23rd symposium on Integrated circuits and system design - SBCCI '10
34
TÃTULO: Analysis of the conditions for worst case switching activity in integrated circuits
AUTORES: Sampaio, C; Monteiro, J; Silveira, L. Miguel ;
PUBLICAÇÃO: 2010, FONTE: 1st IEEE Latin American Symposium on Circuits and Systems, LASCAS 2010 in Proceedings - 2010 1st IEEE Latin American Symposium on Circuits and Systems, LASCAS 2010
AUTORES: Sampaio, C; Monteiro, J; Silveira, L. Miguel ;
PUBLICAÇÃO: 2010, FONTE: 1st IEEE Latin American Symposium on Circuits and Systems, LASCAS 2010 in Proceedings - 2010 1st IEEE Latin American Symposium on Circuits and Systems, LASCAS 2010
35
TÃTULO: Analysis of Power Consumption Using a New Methodology for the Capacitance Modeling of Complex Logic Gates
AUTORES: Sidinei Ghissoni; Joao Batista D dos Santos Martins; Ricardo Augusto D da Luz Reis; Jose Carlos Monteiro;
PUBLICAÇÃO: 2010, FONTE: 19th International Workshop on Power and Timing Modeling, Optimization and Simulation in INTEGRATED CIRCUIT AND SYSTEM DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, VOLUME: 5953
AUTORES: Sidinei Ghissoni; Joao Batista D dos Santos Martins; Ricardo Augusto D da Luz Reis; Jose Carlos Monteiro;
PUBLICAÇÃO: 2010, FONTE: 19th International Workshop on Power and Timing Modeling, Optimization and Simulation in INTEGRATED CIRCUIT AND SYSTEM DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, VOLUME: 5953
INDEXADO EM: WOS
WOS36
TÃTULO: Analysis of the Conditions for Worst Case Switching Activity in Integrated Circuits
AUTORES: Carlos Sampaio; Jose Monteiro; Silveira, L. Miguel;
PUBLICAÇÃO: 2010, FONTE: 1st IEEE Latin American Symposium on Circuits and Systems (LASCAS) in 2010 FIRST IEEE LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS (LASCAS)
AUTORES: Carlos Sampaio; Jose Monteiro; Silveira, L. Miguel;
PUBLICAÇÃO: 2010, FONTE: 1st IEEE Latin American Symposium on Circuits and Systems (LASCAS) in 2010 FIRST IEEE LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS (LASCAS)
INDEXADO EM: WOS
WOS37
TÃTULO: A New Quaternary FPGA Based on a Voltage-mode Multi-valued Circuit
AUTORES: Cristiano Lazzari; Paulo Flores; Jose Monteiro; Luigi Carro;
PUBLICAÇÃO: 2010, FONTE: Design, Automation and Test in Europe Conference and Exhibition (DATE) in 2010 DESIGN, AUTOMATION & TEST IN EUROPE (DATE 2010)
AUTORES: Cristiano Lazzari; Paulo Flores; Jose Monteiro; Luigi Carro;
PUBLICAÇÃO: 2010, FONTE: Design, Automation and Test in Europe Conference and Exhibition (DATE) in 2010 DESIGN, AUTOMATION & TEST IN EUROPE (DATE 2010)
INDEXADO EM: WOS
WOS38
TÃTULO: Integrated Circuit and System Design : Power and Timing Modeling, Optimization and Simulation. 19th International Workshop, PATMOS 2009, Delft, the Netherlands, September 9-11, 2009, Revised Selected Papers
AUTORES: José Monteiro; Rene van Leuken;
PUBLICAÇÃO: 2010
AUTORES: José Monteiro; Rene van Leuken;
PUBLICAÇÃO: 2010
INDEXADO EM: 
Openlibrary
Openlibrary39
TÃTULO: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
AUTORES: Lars Svensson; José Monteiro;
PUBLICAÇÃO: 2009, FONTE: Lecture Notes in Computer Science
AUTORES: Lars Svensson; José Monteiro;
PUBLICAÇÃO: 2009, FONTE: Lecture Notes in Computer Science
40
TÃTULO: Efficient Dedicated Multiplication Blocks for 2's Complement Radix-16 and Radix-256 Array Multipliers
AUTORES: Leandro Zafalon Pieper; Eduardo A C da Costa; Sergio J M de Almeida; Sergio Bampi; Jose C Monteiro;
PUBLICAÇÃO: 2008, FONTE: 2nd International Conference on Signals, Circuits and Systems in SCS: 2008 2ND INTERNATIONAL CONFERENCE ON SIGNALS, CIRCUITS AND SYSTEMS
AUTORES: Leandro Zafalon Pieper; Eduardo A C da Costa; Sergio J M de Almeida; Sergio Bampi; Jose C Monteiro;
PUBLICAÇÃO: 2008, FONTE: 2nd International Conference on Signals, Circuits and Systems in SCS: 2008 2ND INTERNATIONAL CONFERENCE ON SIGNALS, CIRCUITS AND SYSTEMS
INDEXADO EM: WOS
WOS