Generation Of Partial Fpga Configurations At Run-Time

AuthID
 P-004-5EQ
2
Author(s)
Tipo de Documento
Proceedings Paper
Year published
2008
Publicado
in 2008 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE AND LOGIC APPLICATIONS, VOLS 1 AND 2 in International Conference on Field Programmable and Logic Applications
Páginas: 366-371 (6)
Conference
International Conference on Field Programmable and Logic Applications, Date: SEP 08-10, 2008, Location: Heidelberg, GERMANY, Patrocinadores: Xilinx, Altera, Synplicity, MathWorks, Mentor Graph, Recore, XMOS Semiconductor, UTIA, Actel, IEEE Circuits & Syst Soc
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Dblp®/pt/publications/view/136663
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Publication Identifiers
DBLP: conf/fpl/SilvaF08
SCOPUS: 2-s2.0-54949135428
Wos: WOS:000263578100066
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