Lower V Dd Operation of Fpga-Based Digital Circuits Through Delay Modeling and Time Borrowing

AuthID
P-008-2G0
9
Author(s)
Valdes, MD
·
Costas, L
·
Moure, MJ
·
Rodriguez Andina, JJ
·
Tipo de Documento
Article
Year published
2011
Publicado
in Journal of Low Power Electronics, ISSN: 1546-1998
Volume: 7, Número: 2, Páginas: 185-198
Indexing
Publication Identifiers
SCOPUS: 2-s2.0-84856972351
Source Identifiers
ISSN: 1546-1998
Export Publication Metadata
Info
At this moment we don't have any links to full text documens.