Integrated Approach for Circuit and Fault Extraction of Vlsi Circuits

AuthID
 P-001-FRP
3
Author(s)
1
Editor(es)
Anon
Tipo de Documento
Proceedings Paper
Year published
1996
Publicado
in 1996 IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, ISSN: 1063-6722
Páginas: 96-104 (9)
Conference
1996 Ieee International Symposium on Defect and Fault Tolerance in Vlsi Systems, Date: NOV 06-08, 1996, Location: BOSTON, MA, Patrocinadores: IEEE Comp Soc, IEEE Comp Soc, Tech Comm Fault Tolerant Comp
Indexing
Wos®
Scopus®
Publication Identifiers
SCOPUS: 2-s2.0-0030412371
Wos: WOS:A1996BG81K00012
Source Identifiers
ISSN: 1063-6722
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