Marcelino Bicho dos Santos
AuthID: R-000-A9P
51
TITLE: Self-checking and fault tolerance quality assessment using Fault Sampling
AUTHORS: Goncalves, FM; Santos, MB; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2002, SOURCE: 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems in 17TH IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, VOLUME: 2002-January
AUTHORS: Goncalves, FM; Santos, MB; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2002, SOURCE: 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems in 17TH IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, VOLUME: 2002-January
52
TITLE: RTL design validation, DFT and test pattern generation for high defects coverage
AUTHORS: Santos, MB; Goncalves, FM; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2001, SOURCE: IEEE European Test Workshop (ETW 01) in ETW 2001: IEEE EUROPEAN TEST WORKSHOP, PROCEEDINGS
AUTHORS: Santos, MB; Goncalves, FM; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2001, SOURCE: IEEE European Test Workshop (ETW 01) in ETW 2001: IEEE EUROPEAN TEST WORKSHOP, PROCEEDINGS
INDEXED IN: WOS
IN MY: ResearcherID
53
TITLE: Design and test of certifiable ASICs for safety-critical gas burners control
AUTHORS: Goncalves, FM; Santos, MB; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2001, SOURCE: 7th IEEE International On-Line Testing Workshop in SEVENTH IEEE INTERNATIONAL ON-LINE TESTING WORKSHOP, PROCEEDINGS
AUTHORS: Goncalves, FM; Santos, MB; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2001, SOURCE: 7th IEEE International On-Line Testing Workshop in SEVENTH IEEE INTERNATIONAL ON-LINE TESTING WORKSHOP, PROCEEDINGS
INDEXED IN: WOS
IN MY: ResearcherID
54
TITLE: RTL-based functional test generation for high defects coverage in digital SOCs
AUTHORS: Santos, MB; Goncalves, FM; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2000, SOURCE: IEEE European Test Workshop in IEEE EUROPEAN TEST WORKSHOP, PROCEEDINGS
AUTHORS: Santos, MB; Goncalves, FM; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2000, SOURCE: IEEE European Test Workshop in IEEE EUROPEAN TEST WORKSHOP, PROCEEDINGS
INDEXED IN: WOS
IN MY: ResearcherID
55
TITLE: Testability issues in the CMS ECAL upper-level readout and trigger system
AUTHORS: Almeida, CB; Teixeira, IC; Teixeira, JP; Varela, J; Augusto, J ; Santos, M; Cardoso, N;
PUBLISHED: 1999, SOURCE: 5th Workshop on Electronics for LHC Experiments in PROCEEDINGS OF THE FIFTH WORKSHOP ON ELECTRONICS FOR LHC EXPERIMENTS
AUTHORS: Almeida, CB; Teixeira, IC; Teixeira, JP; Varela, J; Augusto, J ; Santos, M; Cardoso, N;
PUBLISHED: 1999, SOURCE: 5th Workshop on Electronics for LHC Experiments in PROCEEDINGS OF THE FIFTH WORKSHOP ON ELECTRONICS FOR LHC EXPERIMENTS
INDEXED IN: WOS
IN MY: ResearcherID
56
TITLE: Low-energy BIST design: Impact of the LFSR TPG parameters on the weighted switching activity
AUTHORS: Girard, P; Guiller, L; Figueras, J; Manich, S; Teixeira, P; Santos, M;
PUBLISHED: 1999, SOURCE: 1999 IEEE International Symposium on Circuits and Systems (ISCAS 99) in ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI
AUTHORS: Girard, P; Guiller, L; Figueras, J; Manich, S; Teixeira, P; Santos, M;
PUBLISHED: 1999, SOURCE: 1999 IEEE International Symposium on Circuits and Systems (ISCAS 99) in ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI
INDEXED IN: WOS
IN MY: ResearcherID
57
TITLE: VHDL fault simulation for defect-oriented test and diagnosis of digital ICs
AUTHORS: Celeiro, F; Dias, L; Ferreira, J; Santos, MB; Teixeira, JP ;
PUBLISHED: 1996, SOURCE: European Design Automation Conference (EURO-DAC 96), with EURO-VHDL 96 and Exhibition in EURO-DAC '96 - EUROPEAN DESIGN AUTOMATION CONFERENCE WITH EURO-VHDL '96 AND EXHIBITION, PROCEEDINGS
AUTHORS: Celeiro, F; Dias, L; Ferreira, J; Santos, MB; Teixeira, JP ;
PUBLISHED: 1996, SOURCE: European Design Automation Conference (EURO-DAC 96), with EURO-VHDL 96 and Exhibition in EURO-DAC '96 - EUROPEAN DESIGN AUTOMATION CONFERENCE WITH EURO-VHDL '96 AND EXHIBITION, PROCEEDINGS
INDEXED IN: Scopus WOS
IN MY: ResearcherID
58
TITLE: Defect-oriented IC test and diagnosis using VHDL fault simulation Full Text
AUTHORS: Celeiro, F; Dias, L; Ferreira, J; Santos, MB; Teixeira, JP ;
PUBLISHED: 1996, SOURCE: 1996 International Test Conference (ITC 1996) - Test and Design Validity in INTERNATIONAL TEST CONFERENCE 1996, PROCEEDINGS
AUTHORS: Celeiro, F; Dias, L; Ferreira, J; Santos, MB; Teixeira, JP ;
PUBLISHED: 1996, SOURCE: 1996 International Test Conference (ITC 1996) - Test and Design Validity in INTERNATIONAL TEST CONFERENCE 1996, PROCEEDINGS
INDEXED IN: Scopus WOS
IN MY: ResearcherID
59
TITLE: BACK ANNOTATION OF PHYSICAL DEFECTS INTO GATE-LEVEL, REALISTIC FAULTS IN DIGITAL ICS
AUTHORS: CALHA, M; SANTOS, M; GONCALVES, F; TEIXEIRA, I; TEIXEIRA, JP;
PUBLISHED: 1994, SOURCE: International Test Conference 1994 (ITC 94) - TEST; The Next 25-Years in INTERNATIONAL TEST CONFERENCE 1994, PROCEEDINGS
AUTHORS: CALHA, M; SANTOS, M; GONCALVES, F; TEIXEIRA, I; TEIXEIRA, JP;
PUBLISHED: 1994, SOURCE: International Test Conference 1994 (ITC 94) - TEST; The Next 25-Years in INTERNATIONAL TEST CONFERENCE 1994, PROCEEDINGS
INDEXED IN: WOS
IN MY: ResearcherID
60
TITLE: PHYSICAL DFT FOR HIGH COVERAGE OF REALISTIC FAULTS
AUTHORS: SARAIVA, M; CASIMIRO, P; SANTOS, M; SOUSA, JT; GONCALVES, F; TEIXEIRA, I; TEIXEIRA, JP;
PUBLISHED: 1992, SOURCE: 1992 INTERNATIONAL TEST CONF ON DISCOVER THE NEW WORLD OF TEST AND DESIGN in INTERNATIONAL TEST CONFERENCE 1992 : PROCEEDINGS: DISCOVER THE NEW WORLD OF TEST AND DESIGN
AUTHORS: SARAIVA, M; CASIMIRO, P; SANTOS, M; SOUSA, JT; GONCALVES, F; TEIXEIRA, I; TEIXEIRA, JP;
PUBLISHED: 1992, SOURCE: 1992 INTERNATIONAL TEST CONF ON DISCOVER THE NEW WORLD OF TEST AND DESIGN in INTERNATIONAL TEST CONFERENCE 1992 : PROCEEDINGS: DISCOVER THE NEW WORLD OF TEST AND DESIGN
INDEXED IN: WOS
IN MY: ResearcherID