Fabian Vargas
AuthID: R-00F-VMY
11
TITLE: Exploiting parametric power supply and/or temperature variations to improve fault tolerance in digital circuits
AUTHORS: Jorge Semião ; Freijedo, J; Andina, J; Vargas, F; Santos, M ; Teixeira, I ; Teixeira, P;
PUBLISHED: 2008, SOURCE: 14th IEEE International On-Line Testing Symposium in 14TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM, PROCEEDINGS
AUTHORS: Jorge Semião ; Freijedo, J; Andina, J; Vargas, F; Santos, M ; Teixeira, I ; Teixeira, P;
PUBLISHED: 2008, SOURCE: 14th IEEE International On-Line Testing Symposium in 14TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM, PROCEEDINGS
12
TITLE: Power-Supply Instability Aware Clock Signal Modulation for Digital Integrated Circuits
AUTHORS: Jorge Semião ; Freijedo, J; Moraes, M; Mallmann, M; Antunes, C ; Rocha, L; Benfica, J; Vargas, F; Santos, M ; Teixeira, IC ; Rodriguez Andina, JJR; Teixeira, JP; Lupi, D; Gatti, E; Garcia, L; Hernandez, F;
PUBLISHED: 2008, SOURCE: International Symposium on Electromagnetic Compatibility in 2008 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC EUROPE)
AUTHORS: Jorge Semião ; Freijedo, J; Moraes, M; Mallmann, M; Antunes, C ; Rocha, L; Benfica, J; Vargas, F; Santos, M ; Teixeira, IC ; Rodriguez Andina, JJR; Teixeira, JP; Lupi, D; Gatti, E; Garcia, L; Hernandez, F;
PUBLISHED: 2008, SOURCE: International Symposium on Electromagnetic Compatibility in 2008 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC EUROPE)
13
TITLE: Delay modeling for power noise and temperature-aware design and test of digital systems
AUTHORS: Freijedo, JF; Jorge Semião ; Rodriguez Andina, JJ; Vargas, F; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2008, SOURCE: Journal of Low Power Electronics, VOLUME: 4, ISSUE: 3
AUTHORS: Freijedo, JF; Jorge Semião ; Rodriguez Andina, JJ; Vargas, F; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2008, SOURCE: Journal of Low Power Electronics, VOLUME: 4, ISSUE: 3
INDEXED IN: 
Scopus 
CrossRef
Scopus CrossRef14
TITLE: Time Management for Low-Power Design of Digital Systems
AUTHORS: Jorge Semião ; Freijedo, JF; Rodriguez Andina, JJ; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2008, SOURCE: Journal of Low Power Electronics, VOLUME: 4, ISSUE: 3
AUTHORS: Jorge Semião ; Freijedo, JF; Rodriguez Andina, JJ; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2008, SOURCE: Journal of Low Power Electronics, VOLUME: 4, ISSUE: 3
INDEXED IN: Scopus CrossRef
Scopus CrossRef15
TITLE: Enhancing the tolerance to power-supply instability in digital circuits
AUTHORS: Jorge Semião ; Freijedo, J; Rodriguez J R Andina; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2007, SOURCE: IEEE-Computer-Society Annual Symposium on VLSI in IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, PROCEEDINGS: EMERGING VLSI TECHNOLOGIES AND ARCHITECTURES
AUTHORS: Jorge Semião ; Freijedo, J; Rodriguez J R Andina; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2007, SOURCE: IEEE-Computer-Society Annual Symposium on VLSI in IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, PROCEEDINGS: EMERGING VLSI TECHNOLOGIES AND ARCHITECTURES
16
TITLE: On-line dynamic delay insertion to improve signal integrity in synchronous circuits
AUTHORS: Jorge Semião ; Freijedo, J; Rodriguez Andina, JJ; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2007, SOURCE: 13th IEEE International On-Line Testing Symposium in 13TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM PROCEEDINGS
AUTHORS: Jorge Semião ; Freijedo, J; Rodriguez Andina, JJ; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2007, SOURCE: 13th IEEE International On-Line Testing Symposium in 13TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM PROCEEDINGS
17
TITLE: Improving the tolerance of pipeline based circuits to power supply or temperature variations
AUTHORS: Jorge Semião ; Rodriguez Andina, JJ; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2007, SOURCE: 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems, DFT 2007 in Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
AUTHORS: Jorge Semião ; Rodriguez Andina, JJ; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2007, SOURCE: 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems, DFT 2007 in Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
INDEXED IN: Scopus CrossRef
Scopus CrossRef18
TITLE: Dynamic fault detection in digital systems using dynamic voltage scaling and multi-temperature schemes
AUTHORS: Rodriguez Irago, M; Andina, JJR; Vargas, F; Jorge Semião ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2006, SOURCE: IOLTS 2006: 12th IEEE International On-Line Testing Symposium in Proceedings - IOLTS 2006: 12th IEEE International On-Line Testing Symposium, VOLUME: 2006
AUTHORS: Rodriguez Irago, M; Andina, JJR; Vargas, F; Jorge Semião ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2006, SOURCE: IOLTS 2006: 12th IEEE International On-Line Testing Symposium in Proceedings - IOLTS 2006: 12th IEEE International On-Line Testing Symposium, VOLUME: 2006
INDEXED IN: Scopus CrossRef
Scopus CrossRef19
TITLE: Dynamic fault test and diagnosis in digital systems using multiple clock schemes and multi-VDD test
AUTHORS: Rodriguez Irago, M; Andina, JJR; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2005, SOURCE: 11th IEEE International On-Line Testing Symposium in 11th IEEE International On-Line Testing Symposium, VOLUME: 2005
AUTHORS: Rodriguez Irago, M; Andina, JJR; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2005, SOURCE: 11th IEEE International On-Line Testing Symposium in 11th IEEE International On-Line Testing Symposium, VOLUME: 2005
INDEXED IN: Scopus 
WOS
Scopus WOS