1
TÍTULO: Evaluating the Scalability of Test Buses
AUTORES: Alexandre Amory; Matheus Moreira; Ney Calazans; Fernando Moraes; Cristiano Lazzari; Marcelo S Lubaszewski;
PUBLICAÇÃO: 2013, FONTE: 15th Annual International Symposium on System-on-Chip (SoC) in INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP (SOC)
INDEXADO EM: WOS
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TÍTULO: A new test scheduling algorithm based on Networks-on-Chip as Test Access Mechanisms  Full Text
AUTORES: Alexandre M Amory; Cristiano Lazzari; Marcelo S Lubaszewski; Fernando G Moraes;
PUBLICAÇÃO: 2011, FONTE: JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING, VOLUME: 71, NÚMERO: 5
INDEXADO EM: Scopus WOS CrossRef
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TÍTULO: Early estimation of wire length for dedicated test access mechanisms in networks-on-chip based SoCs
AUTORES: Amory, ADM; Lazzari, C; Lubaszewski, MS; Moraes, FG;
PUBLICAÇÃO: 2011, FONTE: 24th Symposium on Integrated Circuits and Systems Design, SBCCI2011 in Proceedings - SBCCI2011: 24th Symposium on Integrated Circuits and Systems Design
INDEXADO EM: Scopus CrossRef
5
TÍTULO: Single Event Upset in SRAM-based Field Programmable Analog Arrays: Effects and mitigation
AUTORES: Tiago R Balen; Fernanda Lima Kastensmidt; Marcelo S Lubaszewski; Renovell, M;
PUBLICAÇÃO: 2007, FONTE: IEEE-Computer-Society Annual Symposium on VLSI in IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, PROCEEDINGS: EMERGING VLSI TECHNOLOGIES AND ARCHITECTURES
INDEXADO EM: WOS CrossRef