Marcelino Bicho dos Santos


AuthID: R-000-A9P

Confirmed Publications: 82



71
TITLE: Implicit functionality and multiple branch coverage (IFMB): a testability metric for RT-Level
AUTHORS: Santos, MB ; Goncalves, FM ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2001, SOURCE: International Test Conference in INTERNATIONAL TEST CONFERENCE 2001, PROCEEDINGS
INDEXED IN: Scopus WOS
IN MY: ORCID | ResearcherID
72
TITLE: RTL-based functional test generation for high defects coverage in digital systems  Full Text
AUTHORS: Santos, MB ; Goncalves, FM ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2001, SOURCE: IEEE European Test Workshop in JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, VOLUME: 17, ISSUE: 3-4
INDEXED IN: Scopus WOS CrossRef: 7
IN MY: ORCID | ResearcherID
73
TITLE: Low power BIST by filtering non-detecting vectors  Full Text
AUTHORS: Manich, S; Gabarro, A; Lopez, M; Figueras, J; Girard, P; Guiller, L; Landrault, C; Pravossoudovitch, S; Teixeira, P ; Santos, M ;
PUBLISHED: 2000, SOURCE: 6th IEEE International O-Line Testing Workshop in JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, VOLUME: 16, ISSUE: 3
INDEXED IN: Scopus WOS CrossRef: 19
IN MY: ORCID | ResearcherID
74
TITLE: Defect-Oriented Verilog fault simulation of SoC macros using a stratified fault sampling technique  Full Text
AUTHORS: Santos, MB ; Goncalves, FM ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 1999, SOURCE: 17th IEEE Very Large Scale Intergration Test Symposium in 17TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS
INDEXED IN: Scopus WOS
IN MY: ORCID | ResearcherID
75
TITLE: Low-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activity
AUTHORS: Girard, P; Guiller, L; Landrault, C; Pravossoudovitch, S; Figueras, J; Manich, S; Teixeira, P; Santos, M ;
PUBLISHED: 1999, SOURCE: Proceedings of the 1999 IEEE International Symposium on Circuits and Systems, ISCAS '99 in Proceedings - IEEE International Symposium on Circuits and Systems, VOLUME: 1
INDEXED IN: Scopus
IN MY: ORCID
76
TITLE: Defect-oriented testing of analogue and mixed signal ICs
AUTHORS: Santos, MB ; Goncalves, FM ; Ohletz, M; Teixeira, JP ;
PUBLISHED: 1998, SOURCE: Proceedings of the 1998 5th IEEE International Conference on Electronics, Circuits and Systems (ICECS'98) - Surfing the Waves of Science and Technology in Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, VOLUME: 2
INDEXED IN: Scopus CrossRef: 5
IN MY: ORCID
77
TITLE: Detect-oriented test quality assessment using fault sampling and simulation  Full Text
AUTHORS: Goncalves, FM ; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 1998, SOURCE: International Test Conference 1998 in INTERNATIONAL TEST CONFERENCE 1998, PROCEEDINGS
INDEXED IN: Scopus WOS
IN MY: ORCID | ResearcherID
78
TITLE: Test preparation for high coverage of physical defects in CMOS digital ICs
AUTHORS: Santos, MB ; Simoes, M; Teixeira, I ; Teixeira, JP ;
PUBLISHED: 1995, SOURCE: Proceedings of the 13th IEEE VLSI Test Symposium in Proceedings of the IEEE VLSI Test Symposium
INDEXED IN: Scopus
IN MY: ORCID
79
TITLE: TEST PREPARATION METHODOLOGY FOR HIGH COVERAGE OF PHYSICAL DEFECTS IN CMOS DIGITAL ICS  Full Text
AUTHORS: SANTOS, MB ; SIMOES, M; TEIXEIRA, I ; TEIXEIRA, JP ;
PUBLISHED: 1995, SOURCE: European Design and Test Conference (ED&TC 1995) in EUROPEAN DESIGN AND TEST CONFERENCE - ED&TC 1995, PROCEEDINGS
INDEXED IN: WOS
IN MY: ResearcherID
80
TITLE: On the analysis of routing, cells and adjacency faults in CMOS digital circuits  Full Text
AUTHORS: Casimiro, AP; Santos, MB ; Goncalves, F ; Teixeira, JP ;
PUBLISHED: 1994, SOURCE: Proceedings of the 1994 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems in IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
INDEXED IN: Scopus
IN MY: ORCID
Page 8 of 9. Total results: 82.

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